I've just described an UART transmitter and receiver in VHDL. In simulation everything seems to be fine. In FPGA, the loopback interface works well: I push a button, the transmitter sends data, the receiver receives and display in the 7 segment display.
Regarding communication between laptop and FPGA, I am using a USB<->RS232 cable. Using GtkTerm on linux and tera term on windows I can easily send data to the FPGA. The problem is when I try to send data from FPGA to laptop: just a few bytes arrive in the laptop and many of these bytes are wrong. For instance, I send EE EE EE EE EE EE EE, but I receive only EE CF 14.
I have no idea of what the problem is: if it is software (maybe I've configured something wrong or a driver issue?); if it is hardware (faulty cable?) or if it is code (my VHDL code is wrong).
Any ideas on how to solve the issue?
p.s.: I've tried some few uart transmitters besides mine, they also send just a few bytes. p.s2.: some info: 19200 baud; 8 bits of data, no parity bit, 1 stop bit
if code is needed: https://github.com/hdhzero/hivek-io-modules/blob/master/uart/src/uart_tx.vhd