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I am using AD8347(0.8 GHz to 2.7 GHz Direct Conversion Quadrature Demodulator) to demodulate a BPSK modulated carrier wave. There is no intermediate frequency used.

By feeding the signal into this chip, I was able to get 4 outputs: IOPP, IOPN, QOPP, QOPN (I signal output positive, I signal output negative, Q signal output positive and Q signal output negative).

The source data is 115200 baud BPSK modulated to a 2.4GHz carrier wave. How do I analyze the 4 outputs to retrieve the original data? I understand that BPSK modulation meant that only the IOPP and IOPN signals are useful.

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Your received signal has several deterministic but unknown parameters, the amplitude, the frequency offset, and the sampling timing offset, and perhaps some others. At a minimum you need an AGC to get to a known and desired amplitude, a carrier recovery circuit ( costas loop or a gardner loop) and a symbol timing recovery circuit (early-late gate combined with matched filtering). Oh and a decision device or slicer

For the AGC, decide the signal amplitude you desire, calculate the error in your received signal (Rx signal amplitude - desired amplitude), filter this error, and then use as the input to a numerically controlled gain block (a multiplier). Assuming you do this correctly, the signal amplitude will lock to your desired amplitude

For the carrier tracking, there are many circuits to be used, data-aided, or non-data-aided. for BPSK it might be as easy as squaring the RX signal( which effectively removes the data, filtering it, then feeding back the filtered signal to a numerically controlled oscillator (either a CORDIC, or a complex multiplier). Google "squaring loop."

For the downstream slicer, you will compare your signal against some metric, in the case of BSPK at complex baseband, the sign of your signal is what you use. Your received signal is in the presence of noise, and you want to make that comparison at the center (in the time domain) of the received signal when it is maximized ( or minimized for -1 symbols; the correct words to use are: when the signal is at a local extrema). This is symbol timing recovery. I'm less familiar with this, but this can be done by looking at the derivative of the signal and determining when the signal is increasing, at a local extrema, or decreasing. Do all three of these in parallel and you can get a pretty good picture of your symbol timing.

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  • \$\begingroup\$ Also, there is most likely a DC offset that needs to be compensated for. \$\endgroup\$ – Simon Richter Feb 19 '15 at 12:23
  • \$\begingroup\$ DC offset, and probably IQ phase imbalance/error. These parameters are, from my perspective, more circuit card/ analog domain problems(?) than unknown signal parameter problems, if that makes sense. The DC offset is probably going to require to tune the bias on the ADC inputs? \$\endgroup\$ – Jotorious Feb 19 '15 at 21:38
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Jotorious is right. However, based on information from AD8347 datasheet this chip is based on classic Costas loop circuit with multipliers as phase-detectors. So for the carrier tracking step you should use Costas loop instead of squaring loop.

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