First I am new to this and I signed in to get some help on this problem I have been having. I have done so much googling to figure this problem out and with no luck. I am trying to capture humidity sensor signal using a timerA for MSP43055229 on code composer6.0.1 I am new to microcontrollers so please bare with me. But anyway, when I am in capture mode and the the program goes into my ISR, it will capture only two falling edges and then jump out of the whole program itself and go into either boot.c, copy_zer_init.c,copy_decompress.c among other programs.

From the research I have gathered about this it seems to be related to the watchdog timer which I have disabled. when I comment out the
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
of my code, the program only captures two edges (it is supposed to capture about 40 falling edges of the incoming signal by the way not sure why it doesn't. Please help if you can on that part also if it's not related to the main problem) but instead of jumping out of my whole program it goes back to the main function and stops at my while(1); loop.

So I believe it may have something to do with the watchdog but I am not sure. Please help!

NOTE: my code sends out a "low" signal to the humidity sensor for 18 ms and then a "high" and than waits for a response.

#include "msp430.h"
#include "intrinsics.h"
//#include "stdint.h"

unsigned init_flag=0;// using
unsigned int mode;
unsigned int i=0;
//unsigned int ta1ccr2_delay = 20000;//delay of 20,000 with smclk/8 = 160ms delay
//unsigned int current_event = 0; //store current rising/falling edge
//unsigned int previous_event = 0; // store old rising/falling edge
//unsigned int diff = 0; // store difference in rising/falling edge
//unsigned int record_array[16];                // RAM array for differences
unsigned int raw_data[41];
 * # of clk cycles  = 18ms*1MHz = 18000 clock cycles for and 18ms delay
 * 80us delay = 80/1MHz for initial start up of send signal
 * approx. 40us

 * main.c
int main(void){
    WDTCTL = WDTPW | WDTHOLD;   // Stop watchdog timer
//  int _system_pre_init(void);
    unsigned int flag=80;
//  unsigned int i = 0;
//  unsigned int j = 0;

/*--------PORT2 initialization---------------------------------------*/
          P2DIR |= BIT3; //output
          P2OUT |= BIT3;//high

          P1DIR |= BIT0;// led1 output
          P1OUT &=~ BIT0;

/*------------defining Timer A1 ---------------------------------*/
/***************** TimerA set up: using timer A1 for COMPARE *************************************/
          TA1CCR0 = flag; // upper limit of TAR..used just to enter timer ISR
          TA1CCTL0 = CCIE;// capture/compare control Interrupt enable
          TA1CTL = TASSEL_2 | MC_1 | TACLR | ID_0;//SMCLK | upmode(ccr0 limit) | clear TAR after every limit is reached | don't divide
          __no_operation();//for debugging
    //        _BIS_SR(LPM0_bits + GIE);  //         places CPU in low power mode with interrupts enabled.;
          return 0;

// Timer A1 interrupt service routine

#pragma vector=TIMER1_A0_VECTOR
__interrupt void activate_Sensor_ISR(void)// delay for either 18ms or 40us
        case 0:// start signal
            P2OUT &=~ BIT3;//set low
            init_flag = 1;
            mode = 18000; // 18ms delay
            TA1CCR0 = mode;// change upper limit of TAR
        case 1:
            P2OUT |= BIT3;// set high again
            init_flag = 2;//dont count anymore
            TA1CCR0 = mode;
            P2DIR &=~ BIT3;//set as input now
            P2SEL |= BIT3;//ta2.0
            TA2CTL = TASSEL_2 | MC_2 | TACLR | TAIE; // Setting up TIMERA for capture mode
            //setting up capture/control
            TA2CCTL0 =  CM_2 | CCIS_0| /*SCS |*/ CAP | CCIE;// capture falling edge | P2.3(CCIS_0)| Capture, enable interrupt
            TA1CTL = MC_0;

#pragma vector=TIMER2_A0_VECTOR//ISR for capture mode
__interrupt void capture_signal_ISR(void)
    raw_data[i] = TA2CCR0;//current_event;
  • 2
    \$\begingroup\$ Break your question into paragraphs so it is easier to read. Use capitalization. Also, try and ask a question -- I don't see an actual question. When I start to read something like this, I find it annoying and just want to move on to something else. \$\endgroup\$
    – JYelton
    Oct 11, 2014 at 6:44

1 Answer 1


In the capture interrupt you are filling the array raw_data[41] with nothing to prevent it from overflowing. If you get more than 41 interrupts it will start trampling over other RAM locations, which will probably crash the program.

My guess is that with the watchdog enabled it trips before the array can overflow, then the program restarts and appears to be stuck in the while(1) because that's where it spends most of its time. With the watchdog disabled the interrupts just keep coming and the array overflows, tramples over the return stack and causes a random jump to other code.

  • \$\begingroup\$ Thank you! I will figure a way to prevent overflow and ask my TA if he could help me with this. I do believe that this could be the problem. Appreciate the suggestions! \$\endgroup\$ Oct 11, 2014 at 19:32

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