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I understand how an SR Latch works: is S is 1, it will set Q to 1. If R is 1 it will set Q to 0.

If both S and R are 0, the value of Q should remain unchanged (right?). So the circuit has these stable states:

enter image description here

enter image description here

Now my question is: If 0 voltage is flowing through both the input wires, how can the 1 still exist in the circuit? There must be an external power supply? (I'm assuming there must be because, if you disconnect your computer, everything in the RAM gets wiped) but where would this power supply go without disrupting this circuit?

I hope my question was clear. I just don't understand how it can keep its value when the inputs are 0.

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    \$\begingroup\$ Two side notes not related directly to your question, but I consider helpful: 1. voltage is not flowing; current is flowing 2. "0" does not mean there is no voltage (i.e. floating potential) or there is no current (disconnected). It just means the voltage is below a certain threshold. (BTW: In (old) TTL technology there is even more current flowing out of a "0" input than there is current flowing into an "1" input. In TTL an open input is interpreted as "1". In CMOS there is virtually no static current flowing in or out of inputs). \$\endgroup\$ – Curd Oct 14 '14 at 8:48
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Of course there's an external power supply. Take a look at a NOR gate chip (say, 74HC02) and you'll see it there clear as day: enter image description here

Logic symbols purely show the logic flow of a circuit, not the power flow. Many schematic capture programs will take the power connections as read and automatically connect them to the right nets for you.

Internally a typical CMOS NOR gate is made up of MOSFETs which switch the power coming into the chip in the right way:

enter image description here

You can see there how the output can be switched either to provide power from V+ or to sink power down to GND depending on how the inputs control the MOSFETs.

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  • \$\begingroup\$ perhaps you should point out to them that current and the voltage produced at the outputs of the logic gates are sourced through transistors/CMOS fets, maybe he hasn't made that "logical" connection hehe \$\endgroup\$ – KyranF Oct 13 '14 at 18:10
  • \$\begingroup\$ Aww sick edit skills mate. I like it! \$\endgroup\$ – KyranF Oct 13 '14 at 18:17
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    \$\begingroup\$ I am the edit ninja! Waaah! \$\endgroup\$ – Majenko Oct 13 '14 at 18:18
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Of course there is an external power supply (as you suspected). Here's a quad nor gate: -

enter image description here

Notice pin 7 and pin 14

The same sort of thing is done with op-amps - they don't necessarily show the power pins because they are assumed folk know they are there: -

enter image description here

But once you've learned about them you realize the basic op-amp has power pins (normally 7 and 4): -

enter image description here

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The other answers have addressed part of the question, but it may also be worth noting that the power supply connections are often omitted from schematics (especially conceptual rather than practical ones) such as the RS latch of the question. One also often sees OpAmp circuits where those connections are not mentioned, but rest assured that real parts do in fact need a power supply connection.

For example, here's an op-amp integrator circuit from another question here:enter image description here

The op-amp doesn't show any power connections because they would just clutter up the conceptual schematic, but any real circuit would necessarily have them.

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