How is something like a microchip which is already small as it is able to house even smaller transistors in the millions at such a micro-scale? It seems like such a feat for machine to be able to make something so small and also functional. Maybe I am over-thinking this or lack the understanding, but how is this possible to create a transistor so small which can't be seen by the naked eye but function. What machine could do this? Especially in the 60s.

  • \$\begingroup\$ This will get you started: en.wikipedia.org/wiki/Semiconductor_device_fabrication \$\endgroup\$ – Null Oct 15 '14 at 2:57
  • \$\begingroup\$ This is a good video showing from design to packaging: youtube.com/watch?v=qm67wbB5GmI Not in the 60's but modern day. \$\endgroup\$ – Enemy Of the State Machine Oct 15 '14 at 3:02
  • \$\begingroup\$ Transistors were not made by the millions (at a time) in the 1960s, more like tens or hundreds at a time. There are now hundreds of millions of transistors for every person on this planet. \$\endgroup\$ – Spehro Pefhany Oct 15 '14 at 3:02
  • \$\begingroup\$ This Youtube video from Intel may be of interest. It is strictly visual: youtu.be/d9SWNLZvA8g \$\endgroup\$ – JYelton Oct 15 '14 at 3:12
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    \$\begingroup\$ Those videos are actually rather crappy. If you want to see something that doesn't have nearly as much marketing mumbo jumbo, take a look at the videos I linked - they are older, but actually educational. \$\endgroup\$ – alex.forencich Oct 15 '14 at 7:40

Microchips are made using a very wide variety of process steps. There are basically two main components to each step - masking off areas to operate on, and then performing some operation on those areas. The masking step can be done with several different techniques. The most common is called photolithography. In this process, the wafer is coated with a very thin layer of photosensitive chemical. This layer is then exposed in a very intricate pattern that's projected off of a mask with short wavelength light. The set of masks used determines the chip design, they are the ultimate product of the chip design process. The feature size that can be projected onto the photoresist coating on the wafer is determined by the wavelength of the light used. Once the photoresist is exposed, it is then developed to expose the underlying surface. The exposed areas can be operated on by other processes - e.g. etching, ion implantation, etc. If photolithography does not have enough resolution, then there is another technique that uses focussed electron beams to do the same thing. The advantage is that no masks are required as the geometry is simply programmed into the machine, however it is much slower as the beam (or multiple beams) must trace out each individual feature.

The transistors themselves are built up from several layers. Most chips these days are CMOS, so I will briefly describe how to build a MOSFET transistor. This method is called the 'self-aligned gate' method as the gate is laid down before the source and drain so that any misalignment in the gate will be compensated for. The first step is to lay down the wells in which the transistors are placed. The wells convert the silicon into the correct type for building the transistor (you need to build an N channel MOSFET on P type silicon, and a P channel MOSFET on N type silicon). This is done by laying down a layer of photoresist and then using ion implantation to force ions into the wafer in the exposed areas. Then the gate oxide is grown on top of the wafer. On silicon chips, the oxide used is generally silicon dioxide - glass. This is done by baking the chip in an oven with oxygen at high temperature. Then a layer of polysilicon or metal is plated down on top of the oxide. This layer will form the gate after it is etched. Next, a photoresist layer is put down and exposed. The exposed areas are etched away, leaving the transistor gates. Next, another round of photolithography is used to mask off the regions for the transistor sources and drains. Ion implantation is used to create the source and drain electrodes in the exposed areas. The gate electrode itself acts as a mask for the transistor channel, ensuring that the source and drain are doped exactly to the edge of the gate electrode. Then the wafer is baked so that the implanted ions work their way slightly under the gate electrode. After this, the transistors are complete and the wiring layers are built up one after the other.

I dug up a couple of decent videos that are in fact educational videos and not PR videos:



  • \$\begingroup\$ Essentially wavelengths of light and the manipulation of ions and any gradient of that is the key to creating microchips? \$\endgroup\$ – Foo Fighter Oct 15 '14 at 3:38
  • \$\begingroup\$ Right, the light is used to project the pattern on the surface of the wafer, so the wavelength must be short enough so that the features are sharp. Then the ions are used to change the character of the semiconductor to create all of the p-n junctions that make the transistors work. \$\endgroup\$ – alex.forencich Oct 15 '14 at 3:54
  • \$\begingroup\$ I am surprised at how tangible/intelligible the information of this is, you present the information very well and I thank you for that. \$\endgroup\$ – Foo Fighter Oct 15 '14 at 4:15

It's a photographic process, similar in some ways to a film camera with separate exposure and development steps. They don't have to print the features in actual size; they can print them in a size they can handle and use lenses to focus that image onto the silicon.

  • \$\begingroup\$ The transistor is created when beams of light in the shape of transistors shine down upon the silicon wafers, Is this right? \$\endgroup\$ – Foo Fighter Oct 15 '14 at 3:24
  • \$\begingroup\$ Basically, yes. The process repeats several times to make the different features, so there's no one image "in the shape of a transistor". \$\endgroup\$ – AaronD Oct 15 '14 at 3:29
  • \$\begingroup\$ All beams meant for creating a single transistor. Are all these transistor created the same for the microchip? \$\endgroup\$ – Foo Fighter Oct 15 '14 at 3:34
  • \$\begingroup\$ Nope. Some can be FET's, some can be BJT's, some can be resistors, or even low-value capacitors. Even if the circuit is mostly 2D, the components are definitely 3D. Each layer is done as one exposure that covers the entire wafer, or at least a large area compared to the features themselves. \$\endgroup\$ – AaronD Oct 15 '14 at 3:43
  • \$\begingroup\$ And because it's photographic, literally anything can be an effective "cutting" tool, even a speck of dust or lint. And the raw tolerances tend to be rather wide anyway. So every die needs to be tested before it gets packaged. \$\endgroup\$ – AaronD Oct 15 '14 at 3:47

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