There are several reasons for this.
First of all, memory takes up a lot of silicon area. This means that increasing the amount of RAM directly increases the silicon area of the chip and hence the cost. Larger silicon area has a 'double whammy' effect on price: larger chips mean less chips per wafer, especially around the edge, and larger chips means each chip is more likely to get a defect.
Second is the issue of process. RAM arrays should be optimized in different ways than logic, and it is not possible to send different parts of the same chip through different processes - the whole chip must be manufactured with the same process. There are semiconductor foundaries that are more or less dedicated to producing DRAM. Not CPUs or other logic, just straight up DRAM. DRAM requires area-efficient capacitors and very low leakage transistors. Making the capacitors requires special processing. Making low leakage transistors results in slower transistors, which is a fine trade-off for DRAM readout electronics, but would not be so good for building high performance logic. Producing DRAM on a microcontroller die would mean you would need to trade off the process optimization somehow. Large RAM arrays are also more likely to develop faults simply due to their large area, decreasing yield and increasing costs. Testing large RAM arrays is also time consuming and so including large arrays will increase testing costs. Additionally, economies of scale drive down the cost of separate RAM chips more so than more specialized microcontrollers.
Power consumption is another reason. Many embedded applications are power constrained, and as a result many microcontrollers are built so that they can be put into a very low power sleep state. To enable very low power sleep, SRAM is used due to its ability to maintain its contents with extremely low power consumption. Battery backed SRAM can hold its state for years off of a single 3V button battery. DRAM, on the other hand, cannot hold its state for more than a fraction of a second. The capacitors are so small that the handful of electrons tunnel out and into the substrate, or leak through the cell transistors. To combat this, DRAM must be continuously read out and written back. As a result, DRAM consumes significantly more power than SRAM at idle.
On the flip side, SRAM bit cells are much larger than DRAM bit cells, so if a lot of memory is required, DRAM is generally a better option. This is why it's quite common to use a small amount of SRAM (kB to MB) as on-chip cache memory coupled with a larger amount of off-chip DRAM (MB to GB).
There have been some very cool design techniques used to increase the amount of RAM available in an embedded system for low cost. Some of these are multi chip packages which contain separate dies for the processor and RAM. Other solutions involve producing pads on the top of the CPU package so a RAM chip can be stacked on top. This solution is very clever as different RAM chips can be soldered on top of the CPU depending on the required amount of memory, with no additional board-level routing required (memory busses are very wide and take up a lot of board area). Note that these systems are usually not considered to be microcontrollers.
Many very small embedded systems do not require very much RAM anyway. If you need a lot of RAM, then you're probably going to want to use a higher-end processor that has external DRAM instead of onboard SRAM.