# Designing a stiff voltage source using an emitter follower

simulate this circuit – Schematic created using CircuitLab

I am new to electronics, and I am trying to do Exercise 2.2, page 67 of The Art of Electronics.

Use a follower with base driven from a voltage divider to provide a stiff source of +5V from an available +15V supply. Load current (max) = 25 mA. Chose your resistor values so that the output voltage doesn't drop more than 5% under full load.

According to my understanding, a BJT in emitter follower configuration has its emitter following the base, no matter what the emitter signal is fed to. Therefore, under normal operation the emitter follows the base (with a 0.6V difference because of forward voltage drop), and is not really influenced by what's connected to it.

We need to find resistor values so that even under maximum load current 25mA, the emitter voltage never drops below 5V - 0.05*5V = 4.75V.

If I set VE(minimum) = 4.75V, I(load,maximum) = 25mA, I can compute the corresponding minimum load resistance value but I believe this is useless and is meaningless.

If there is no load, I set VE = 5V. So VB = 5.6V. I would have used the voltage divider equation to find the ratio needed between R1 and R2, but I am not sure this is valid since there is a current going through the BJT collector.

I am kind of lost on what i need to do. It's the first design question I try, it seems like there are more unknowns than constraints and so we have to set some values, and I have no electrical intution/experience to know what to set to which value and why.

Thank you for your help.

• What is Vbe_on of the transistor? Is it ideal (0)? – clabacchio Oct 16 '14 at 17:41
• There is a lab manual (or student manual) amazon.com/The-Art-Electronics-Student-Manual/dp/0521377099/… that goes with AoE. (I had a copy but it grew legs one day.) It's well worth it for someone like you starting out. In the above circuit the "tricky" part will be picking R1 and R2. I guess the first thing you need to assume is some current gain for the transistor (assume it's 100) then at 25mA there will be 0.25mA flowing into the base... this causes the base voltage to droop a bit. pick R's for a small droop. – George Herold Oct 16 '14 at 17:42
• Why is that so? The load current is different from the emitter current (IE = I in R3 + I in Load) ... we don't know the current in R3 when there is 25mA through the load... – Andrei A.K. Oct 16 '14 at 18:08
• @AndreiA.K., (if you include my name and the at sign I'll get a message that you responded.. otherwise I won't know.) A simple transistor model is that the base current controls the collector current... see transistor man Figure 2.5 (2nd ed.) (Once you learn more you'll learn some more complicated models.. but this works for a lot of things.) – George Herold Oct 16 '14 at 18:20
• @GeorgeHerold Thanks for your help. Yes, I know this, but the 25mA is through the load, not through the emitter. The current through the emitter is 25mA + the current through the emitter resistor R3, which we don't know. – Andrei A.K. Oct 16 '14 at 19:14

## 5 Answers

Here's an overview of the design process to get you started. I'll let you work out the exact calculations.

I would replace $R_{\text{load}}$ with an independent current source $I_{\text{load}}$ for your simulation (you can use your CircuitLab schematic for simulation once you add resistor values). Set $I_{\text{load}} = 25$mA since that is your worst case.

Pick a relatively large emitter resistor $R_3$. This simply provides a load to the transistor if the actual load isn't connected (e.g. $I_{\text{load}} = 0$). For example, use $R_3 = 10$k$\Omega$. If $V_{\text{out}} = 5$V then the current through $R_3$ is $0.5$mA and $I_{E} \approx 25.5$mA in the worst case ($I_{\text{load}} = 25$mA).

Next you need to determine the worst case (highest) $I_B$. Use the lowest $\beta$ in the transistor's datasheet (worst case) and then calculate

$$I_B = \frac{I_E}{\beta + 1}$$

Now in order to make the resistor voltage divider "stiff" you need to make sure that the unloaded bias current through the resistors (call it $I_{\text{div}}$) is at least 10 times the load current (in this case $I_B$ is the load for the voltage divider). Otherwise the load current draws too much current away from $R_{2}$, which causes the voltage at the output of the voltage divider decrease too much. This puts a constraint on the maximum value of $R_1 + R_2$ since

$$I_{\text{div}} = \frac{15}{R_1 + R_2} > 10I_B$$

This equation plus the voltage divider equation

$$\frac{R_2}{R_1+R_2}15 = 5.6$$

gives you two equations and two unknowns.

• Thanks. I picked R1 = 2.4K, R2 = 1.5K. I could've also picked for example R1 = 3.3K and R2 = 2K. Any reason why I should pick one over the other, or are they both equally good? Also, nowhere in your solution do we take into account the 4.75V minimum voltage (@ 25mA). Any reason why? – Andrei A.K. Oct 16 '14 at 20:59
• @AndreiA.K. Both of those resistor pairs sound reasonable. The lower valued pair would result in an even "stiffer" voltage divider, but the higher valued pair consume less power. Whichever is more important to you will determine which pair to use. I didn't use the 4.75V minimum voltage because I over-designed a bit and assumed 5V at 25mA with a 0.6V $V_{BE}$ drop (hence 5.6V at the voltage divider output). If you want to be a bit closer to 4.75V at 25mA I would set the voltage divider to output 4.75V + 0.7V = 5.45V (assume $V_{BE} = 0.7$ to be safe) instead of 5.6V. – Null Oct 16 '14 at 21:11

Let me say this as a answer so we don't get yelled at for too many comments.
OK let's first pick R3. The purpose of R3 is just to keep the transistor happy when there is no load. you want to have a little current going through it. A nice number might be 1mA of current so at 5V take R3 to be 5kohm. R3 will then always have 1mA flowing (and we can now forget about it.) So now go ahead and choose R1 and R2 to give you 5.6 volts at the base.

• Thanks. I get what you mean so far. However there is another problem. Usually with a voltage divider I would just do, VB = 15V*R2/(R1+R2) = 5.6, pick R1 and R2 such as this equation holds. However with this circuit there is a current going through the collector, which voids the voltage divider equation. When the voltage divider equation is derived the current through the source is the same as the current going through R1 and R2, but this is not the case here since we also have the BJT collector connected to the source. – Andrei A.K. Oct 16 '14 at 19:35
• No, your equation still holds. We assume that the 15V source is ideal and can supply as much current as we need with no drop in voltage. Or to say it another way the voltage across R1 and R2 is always 15V regardless of how much collector current flows. – George Herold Oct 16 '14 at 19:41

This can be tackled as a voltage divider problem. Without a load, the output should be 5V, which means (using Vf = 0.6V) that the base should be at 5.6V. Therefore, 15V(R2/R1+R2) = 5.6V. Solving for R1, R1 = 1.679R2.

Since R3 can be arbitrarily large, It can be ignored. If you find you can't ignore it, just make it bigger.

At 5V, a 200 Ohm resistor will give 25mA. Of course, the emitter voltage has sagged 5%, to 4.95, which give a new current of 24.75mA, which is close enough to 25mA, given that we are to use 5% resistors for our solution.

An emitter resistor looks beta+1 times larger at the base input, so the transistor plus base resistor R3 can be replaced by a resistor parallel to R2 with a value of (beta+1)*R3. If we are using a beta of 100, then 101*200 = 20.2K ohms.

If the emitter has sagged to 4.95V, then the base is now 4.95+0.6 = 5.55V

We know the relationship between R1 and R2, which is R1 = 1.679R2.

We also know that 15((R2||20.2K)/(R1 + R2||20.2K) = 4.95V

Substituting 1.679R2 for R1, we now have 15((R2||20.2K)/(1.679*R2 + R2||20.2K) = 4.95V.

Algebra gives us R2 = 4.2K Ohms. The nearest 5% resistor less than 4.2K is 3.9K Ohms.

R1 is then 5.1K * 1.679 = 6.5K, which is right between 6.2K and 6.8K.

6.2K gives a Vbase of 5.79V 6.8K gives a Vbase of 5.46V

First, we know that $V_{base} \approx V_{emitter} + 0.6V$ and that the exercise is asking us to keep $V_{emitter}$ within 5 and 4.75V (5% tolerance) when $V_{base}$ is driven from a voltage divider that is hooked up to 15V. In other words, we need to keep $V_{base}$ ($V_{out}$ from the voltage divider) within 5.6 and 5.35V.

Recall that the voltage divider equation is: $$V_{out} = V_{in}\frac{R_2}{R_1 + R_2}$$

But the above equation is the voltage divider equation with no load. So for our circuit, we will also be using: ($R_{ef}$ is the resistance of the emitter follower) $$V_{out} = V_{in}\frac{R_2\ ||\ R_{ef}}{R_1 + (R_2\ ||\ R_{ef})}$$

From this equation we can see that if $R_{ef}$ changes, $V_{out}$ will also change. So let's figure out how to calculate $R_{ef}$. We start with the input impedance of an emitter follower: $$Z_{ef} = (\beta + 1)(R_3\ ||\ Z_{load})$$

And if we assume that our load has no capacitance: $$R_{ef} = (\beta + 1)(R_3\ ||\ R_{load})$$

Next we want to figure out the worst-case load resistance that can be placed on our circuit. The exercise tells us that 25mA is the max current that the load will draw. We know that we will be supplying 5V to the load so we use Ohm's Law to calculate that the worst-case load resistance is 200$\Omega$. ($R_{load} = 5/.025 = 200\Omega$)

Now that we know $R_{load}$ we can start picking resistor values and working our way back to the voltage divider resistor values. Notice that the lower that $R_{ef}$ is, the more $V_{out}$ will sag. So our goal is to make $R_{ef}$ as high as possible with and without a load to prevent $V_{out}$ from sagging. We will start with $R_3$.

In order to make $R_{ef}$ high, we need to make $R_3$ high. When there is no load, $R_{ef}$ will be around 100 times the resistance of $R_3$. When there is a load, we need to make sure that $R_3 \gg R_{load}$ so $R_{ef}$ can be as high as possible. That is, around 100 times the resistance of $R_{load}$. So we will pick $R_3 = 10k$.

To make our lives a bit easier for the next step, let's figure out the ratio between $R_1$ and $R_2$ when there is no load: $$5.6 = 15\frac{R_2}{R_1 + R_2}\\ \ \\ R_1 = 1.67R_2$$

Now we get to the part in the exercise where it asks us to not let $V_{base}$ ($V_{out}$) fall below 5.35V. Let's plug our values into the loaded voltage divider equation and simplify: $$V_{out} \leq V_{in}\frac{R_2\ ||\ R_{ef}}{R_1 + (R_2\ ||\ R_{ef})}\\ 5.35 \leq 15\frac{R_2\ ||\ R_{ef}}{1.67R_2 + (R_2\ ||\ R_{ef})}\\ \ \\ R_2 \leq \frac{R_{ef}}{12}$$

Using our worst-case scenario (aka when the circuit is loaded), we can see that $R_{ef} \approx 20k$. ($R_{ef} = (\beta + 1)(R_3\ ||\ R_{load}) \approx 100*200$). Using this value we can see that the highest value we can pick for $R_2$ is around 1.6k. ($20000/12$).

We can then use our ratio from before ($R_1 = 1.67R_2$) to pick standard resistor values that are close to the ratio. We see that $R_1 = 2.4k$ and $R_2 = 1.5k$ match our ratio pretty well and will keep the output within our tolerance range. Any higher than this, and you'll start to go outside of the tolerance range.

One last thing I want to mention is that we can pick values for $R_1$ and $R_2$ that are much lower as long as their ratio is correct. The lower you go in your selection, the stiffer your voltage divider becomes but this also causes more power consumption. The higher you go, the less power consumption but you lose stiffness.

I am not sure, but I think you want a current follower and the configuration for the base on the transistor is different. The question said "follower" not voltage follower, and I don't think your configuration would follow the current with near unity gain as drawn. See https://www.electronics-tutorials.ws/transistor/tran_1.html