Well, you might be able to do it for accelerating your simulation, but it is not possible to synthesize this and put it on an FPGA. Verilog code is a hardware description language that describes the functionality and interconnections of your design. It is not executed like a program, it is synthesized into the equivalent of a schematic diagram.
You could run your FFT algorithm on a CPU that's written in verilog, but that rather defeats the purpose of using an FPGA if you need a very fast FFT. However, there are FFT cores available, so you should not have to reinvent the wheel. I believe the Xilinx core generator can generate one, or you can use one from a site like opencores.org.
By the way, bit reversal, if I understand what you mean by that, should be a trivial operation on an FPGA if it's implemented correctly.