# SMPS: What is current mode instability (aka “sub-harmonic oscillation”)?

In peak current controlled switching power supplies, there is a phenomenon called “current mode instability” aka “sub-harmonic oscillation”. What is that? Can't seem to get a good explanation of this....

Bonus: (To mitigate this side effect, they recommend using something called "slope compensation".)

Rather than going into the mathematics of this, it's quite easy to see this graphically. Consider a peak current mode controller operating at <50% duty cycle. Then you can see below that perturbing the system results in the perturbation decaying and the system returning to steady-state operation.

Simple as that.

See source for a more detailed explanation.

You can find a good explanation of all this in this paper from TI:

Basically subharmonic oscillation is not a small signal instability, it's a large signal phenomenon in peak current mode control that occurs when the duty cycle is greater than 50%. (Though under certain circumstances it can occur below 50% duty cycle as well.) By adding a ramp signal to the output of the error amp it is possible to stabilize a peak current mode converter for all duty cycles, but the control loop no longer behaves exactly like a current mode converter.

• "Gain peaking by the inner current loop can...can cause the voltage feedback loop to break into oscillation at one-half the switching frequency" not sure I understand this... even though they provide a nice little figure. Gain Peaking? Oct 22 '14 at 15:33

The math is a little tricky. Dr. Ray Ridley did a lot of work on this back in the early days of current mode control, but essentially a current-mode controller operating in continuous mode with duty cycle at or above 50% is not unconditionally stable, and a pertubation (change) in the load will cause the converter to break into a periodic instability that is self-sustaining - you see this as adjacent pulses being radically different from each other - narrow-wide-narrow-wide-narrow-wide...

Essentially, a current-mode controller is a third-order system with a low-frequency pole and a double pole at half the switching frequency.

Adding appropriate slope compensation to the current information can be mathematically shown to fix the instability by splitting the double pole (moving one of them to much higher frequency) making the system behave similarly to a voltage-mode control system - stable and easy to compensate.

Sub-harmonic oscillations in current-mode-controlled converters are easily revealed through simple drawings as shown in akellyirl answer. However, it is less known that these oscillations find their origin in the inner current-loop instability affected by the presence of a right-half-plane zeros (RHPZ) pair. As demonstrated by Ray Ridley in his dissertation, it is too high a crossover frequency of the loop gain that causes problems. Below is a typical loop gain magnitude-phase plot:

You see that in lack of slope compensation ($$\D=50\%\$$ in this example) the loop gain crosses over in an area where the phase is close to 0°. Should you excite the converter in this mode and you experience sustained oscillations. Now inject some slope compensation and you reduce the loop gain, crossing over at a lower frequency where phase margin is more comfortable: $$\m_c=2\$$ implies that there is 100% compensation, the external ramp slope equals the inductor current upslope scaled by the sense resistance.