This question is partially an "understanding english" question and partially and "understanding the pierce oscillator configuration" question.
I'm currently looking at using a Freescale Kinetis series ARM microcontroller for a project of mine (specifically one of the KL2x series, reportedly compatible with the K20 series used on the Teensy3.1 board).
I was reading the datasheet about the oscillator and clock generator modules. There are many configurations that the oscillator can be put into, but the one I'm interested in is the "high frequency, high gain" mode which can be used for driving the internal PLL. I saw the following diagram:
The datasheet says that for the mode I want (high frequency, high gain), the above connection diagram can be used (there are two possibilities: Connection 2 and Connection 3; Connection 3 uses external capacitors). I have chosen "Connection 2" because the internal capacitors that the processor offers are sufficient for the loading of my crystal (they are a capacitor ladder with 2, 4, 8, and 16pF capacitors configurable by register). However, there a note attached to the line that says I can use Connection2/Connection3 written in the following great english:
With the low-power mode, the oscillator has the internal feedback resistor Rf. Therefore, the feedback resistor must not be externally with the Connection 3.
I was slightly confused by this because it doesn't say anything about Connection 2, so I read the sections on high power and low power modes:
126.96.36.199 High-Frequency, High-Gain Mode
In high-frequency, high-gain mode, the oscillator uses a simple inverter-style amplifier. The gain is set to achieve rail-to-rail oscillation amplitudes. This mode provides low pass frequency filtering as well as hysteresis for voltage filtering and converts the output to logic levels. In this mode, the internal capacitors could be used.
188.8.131.52 High-Frequency, Low-Power Mode
In high-frequency, low-power mode, the oscillator uses a gain control loop to minimize power consumption. As the oscillation amplitude increases, the amplifier current is reduced. This continues until a desired amplitude is achieved at steady-state. In this mode, the internal capacitors could be used, the internal feedback resistor is connected, and no external resistor should be used. The oscillator input buffer in this mode is differential. It provides low pass frequency filtering as well as hysteresis for voltage filtering and converts the output to logic levels.
I interpreted the above to say that, in my mode of interest (high gain), the internal resistor is not being used (since it didn't explicitly say so). Therefore, I am under the impression that I need to provide a feedback resistor.
I've never really looked much at the pierce oscillator until now, but apparently a feedback resistor is part of that. My question is this: Assuming I need to actually provide this feedback resistor, what value should it be (or where can I find this out? The MCU datasheets are entirely silent other than saying that "you need one")? I know it's used for biasing the inverter (which in my case is inside the MCU), but that's about it.