Above is a TTL totem pole output NAND gate. There is a 120 ohm pull up resistor there. Since it is called pull up, can we say that the HI output will be connected to a very high input impedance? If so what can it be as an example? Aren't NAND gates in an IC are connected to each other by being ones output is other's input? I mean in the figure the output will be the input of another gate right? If so HIGH will not be 5V since there will not be input impedance unless it is not connected to a very high resistance.
Where is this NAND gate's input coming from and where is the output going to? If the output is 5V isnt it high for a new TTL gate input and if is not 5V why do we call the resistor pull up in there?