Where to simulate and test Microprocessor designs? [closed]

I'm reading book on computer architecture by Patterson and Hennessy. Now I'm much interested in designing a real-time working microprocessor. But i didn't have any idea where to start from! I started to learn VHDL so suggest me something from where i can design processor from gate level and implement it on real working hardware.

EDIT: Since I mentioned that I'm a bit familiar with VHDL so simulation using VHDL will be more easy. But what i am actually concerned is that if VHDL simulates my design perfectly will this design also work well on real time hardware(FPGA Board)? What are the precautions to be taken to ensure same OR is there any other software(tool) which is more nearer to reality and considers most of real time challenges in simulation? To be more specific i want to know how engineers at Intel, IBM, Tilera or AMD design, simulate and verify their Processors designs? What are those techniques and processes?

closed as too broad by Matt Young, Leon Heller, Ricardo, Keelan, placeholderOct 28 '14 at 1:22

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• It would be best to tackle each individual part of a processor separately and build from there. Even a basic arithmetic logic unit will be a good challenge to build from scratch. A very small FPGA would be a good place to test in hardware, but you could simulate for free. – David Oct 27 '14 at 20:13
• It will also be great if I'm able to build an ALU but question still remained unanswered where to simulate and FPGA board is best? – shafeeq Oct 27 '14 at 20:21
• Any of the vendors tools will allow you to simulate for free, this will be fine for basic designs. Look up Xilinx or Altera and grab their latest installer, then work through the examples. – David Oct 27 '14 at 20:25
• Or the free open-source VHDL simulator, ghdl. sourceforge.net/projects/ghdl-updates – Brian Drummond Oct 27 '14 at 20:41
• Opencores.org has open-source HDL design repository, good place to check so you avoid reinventing the wheel. – MarkU Oct 27 '14 at 21:19

• There is a very important point in your answer - if your ultimate goal is to implement the functionality on a real device (e.g. FPGA or CPLD) then you need to be very careful to use VHDL or Verilog "correctly". There is no sense in writing a model that uses features intended for simulation (e.g. wait until) if you want it to end up in real silicon. – David Oct 27 '14 at 21:57