I am using ModelSim PE Student Edition, and I am trying to write a module which shifts right arithmetic. After searching online, and consulting a Verilog textbook, I found to shift right arithmetic I can use the ">>>" operator. However when I attempt to do so and simulate the module, it only does a regular shift ie if the msb is a 1, it doesn't copy 1's into the shifted places, instead it is putting 0's. Below is a sample of what I am doing.
module shifter( input [31:0] shamt, output reg [31:0] result ); reg[31:0] temp; always@(*)begin temp=32'hfff00fff; result[31:0]=temp[31:0]>>>shamt[4:0]; end endmodule