As given in most of the texts and online resources, the JK flip-flop requires a clock signal with an edge detector circuit so that the flip flop will be sensitive to the inputs only when the clock signal undergoes transition from low to high(Positive edge triggering)
What would happen if the clock signal is directly applied to the JK flip flop? I'm not sure (correct me) if directly applying clock pulse to JK is called level triggering. The question arises when both J and K inputs are 1. Would it keep toggling at every high level(And output would be similar to flashing an LED from 555)?
We've performed the experiments of verifying function tables for all the latches and flip-flops in our practical sessions. But we have directly fed the clock output from 555 to the flip flops.
Does the type of triggering has no effect on functioning of a Flip-Flop?