# Dual-supply op-amp LDO does not work, but single-supply does

I'm designing an LDO with dual outputs (Vout and -Vout), and only the positive output is shown in the pictures below. I'm having large trouble using dual supply op-amps in the design, and my single-supply one works fine and is shown in the first image.

But my LDO using a dual-supply op-amp does not work at all in the same configuration, and I've tried a few different dual-rail op-amps. Am I missing something in the dual-supply design?

The design with a dual-supply op-amp just saturates to the positive rail.

The problem was that the dual supply could not get close enough to the rail.

• Check the output voltage swing of each opamp is large enough to actually turn off the FET. You're using a different opamp in the second circuit. – user_1818839 Nov 1 '14 at 17:53
• The output of the dual-supply op-amps you tried may not be rail-to-rail. Therefore they may not be able to get the gate close enough to the source (depending on Vth) to reduce the drain current enough to keep the LDO in regulation. The single-supply amplifier looks like it can get within about a volt of the positive rail. You might want to look for a rail-to-rail output dual supply amp. – John D Nov 1 '14 at 17:55
• I don't understand your circuit. Do you mean for the opamps to have postive feedback? – George Herold Nov 1 '14 at 19:15
• @GeorgeHerold The P-channel MOSFET inverts the signal and adds a bunch of gain, probably affecting the closed-loop phase margin, but that's another story. – Spehro Pefhany Nov 1 '14 at 19:50
• As spehro implies, once you have an opamp with rail to rail output, you will very likely find that apart from regulating the average voltage reasonably, it will oscillate in the region of ten to 100 kHz. – Andy aka Nov 1 '14 at 20:27

Dual supply opamps are not known for their ability to operate near the rails. So, most likely is that the opamp can't get close enough to the $V_{\text{dd}}$ to control the FET. FDS4465 has a $V_{\text{th}}$ of -0.2V to -1.8V and the LT1007 for example can only get to about -1.5V of $V_{\text{dd}}$. If the FET you have has a nominal or less $V_{\text{th}}$, then try as it might, the opamp will not be able to reach a high enough output voltage to modulate FET conductance or turn FET off. A high $V_{\text{th}}$ FET, and/or a drive circuit that can reach $V_{\text{dd}}$ should be used.

First, please check LT1007's datasheet, section "Unity-Gain Buffer Application (LT1007 Only)", it has BJT input with input voltage clamp diodes. So if the output voltage goes beyond 1V + 0.7V, the input clamp diode will conduct, try to use another OP without input clamp, such as LF412, it has JFET input.

Another problem is just as others say, if your input voltage is two high, and your OP's positive output voltage swing is not high enough, then the OP can't modulate the LDO's output lower, the negative feedback loop is break then.

And the third question, if you want to make a "LDO", then the output voltage should very close to the input voltage, right? So $V_{in}$ should be close to $V_{out} = V_{ref} * \frac{R_{3} + R_{2}}{R_{3}}$. If $V_{in} = 10V$, and the voltage drop on FET is low enough, the voltage feedback to the positive input of OP will be 5V or so, the OP will go to saturation, otherwise your voltage drop on FET will bigger, then it's not a 'LDO'. I suggest to lower the input voltage or change the ratio of $R_{2}$ and $R_{3}$.

• The simulation voltages are for simulation purposes only, the implemented version has a VDD of 5.2V and output of 5V. It uses a ultra low noise reference input of 2.5V with the op amp gain set to 2 to get a 5V output – Steinar Nov 1 '14 at 19:39
• Yes, by lower the input voltage or change the resistors' ratio, you can choose a OP easier, i think. – diverger Nov 1 '14 at 19:42
• This isn't actually the final op, i just picked a few at random to validate the idea. All the dual supply ones just happened not to have rail to rail capability. – Steinar Nov 1 '14 at 19:46

Neither one of those op-amps can reliably turn that particular MOSFET 'off' (by swinging within a few hundred mV of the positive rail), though one is better than the other. I would look for a guaranteed swing within 200mV of the positive rail, since the -400mV minimum Vgs(th) has a temperature coefficient and you probably don't want it to go overvoltage on a cold day in Alberta.

You need to use an op-amp with "rail-to-rail output", and look carefully at the actual guaranteed specs. It's possible to add some parts (like diodes and a resistor) and work with what you have, but easier to just use a part that's made for the job.

• "Vgs(th) has a temperature coefficient and you probably don't want it to go overvoltage on a cold day in Alberta." From the datasheet, if the temperature is lower, than $V_{GS(th)}$ will lower too, what do you mean with the term 'overvoltage'? – diverger Nov 3 '14 at 5:56
• @diverger If Vgs(th) is lower, then the op-amp must swing closer to the positive rail to turn the series pass element fully off. (Even worse, the LT1006, which appears to work typically, can't get as close to the positive rail as the temperature drops). So if the pass element doesn't fully turn off, then the output voltage of the home-brew LDO can go overvoltage and possibly damage whatever it's connected to. Needless to say, this is worse than something that doesn't work every time- the odd unit that has especially low Vgs(th) dies when exposed to especially low temperature under bias. – Spehro Pefhany Nov 3 '14 at 9:58
• Solve the equation: $K_{p}[2(v_{SG}+V_{TP})v_{SD}-v_{SD}^2]\:=\:0$, i can get the same result. I want know, if i can get the same conclusion easier? – diverger Nov 3 '14 at 14:28