# Truth Table for JK flip-flop circuit?

Given a JK flip-flop circuit (using a D flip flop with a 2 by 1 MUX) how can I derive a truth table from this circuit?

D = JQ' + K'Q

Note: This is NOT a homework question. I just simply want to know how to track various inputs to understand the functionality of this circuit

You've already derived the equation for the input to the D input of the flip-flop:

D = (J • $\mathsf{\small \overline{\text{Q}}}$) + ($\mathsf{\small \overline{\text{K}}}$ • Q)

So you can construct a truth table for this equation:

J  K  Q     D
-------    ---

0  0  0     0
0  0  1     1
0  1  0     0
0  1  1     0
1  0  0     1
1  0  1     1
1  1  0     1
1  1  1     0


Note because it is a clocked flip-flop, the Q and $\mathsf{\small \overline{\text{Q}}}$ will not reflect the state of D until after the clock pulse (rising edge of Clk).

Also note that when J and K are both 1, the output toggles, which is the correct behavior for a J-K flip-flop.