I have difficulty understanding how the delay (mainly inertial delay: AFTER) mechanism works in VHDL. I'll start with this:
target <= waveform AFTER 3 NS;
As long as waveform
is a pulse longer than 3ns it only gets delayed by 3ns, else nothing appears on target
. But that's just the result of how VHDL interprets the above signal assignment. I want to know what exactly happens there! For example what happens if we have a conditional assignment defining waveform
itself, like this:
waveform <= '1' AFTER 2 NS WHEN (waveform = '0' AND NOW < 10 NS)
ELSE '0' AFTER 5 NS;
(I got a bit carried away writing the condition!), What I mean is which time
and value for waveform
are taken into account when evaluating the condition to assign waveform
to target
. Or is waveform
simply evaluated (drawn) to obtain an actual WAVEFORM and then applied to target
as I said above (shorter than 3ns gets thrown away, otherwise just shifts 3ns); [I know its obviously not the second way, just wanted to make my point.]