Is the distortion on the rising edge? Pull-up of Q1 \$V_{\text{ds}}\$ through R2 is a limiter for bandwidth. At close to \$V_{\text{ds}}\$=0V, BS170 has \$C_{\text{ds}}\$~40pF and \$C_{\text{gd}}\$~20pF. So, time constant for R2(\$C_{\text{ds}}\$+\$C_{\text{gd}}\$) ~ 4usec. After the rise of GPIO has played out, the last 2V to 2.5V of rise will follow that 4usec time constant, which makes the large signal bandwidth less than 100kHz. Other capacitance in the circuit will make things worse. Lowering R2 to 1kOhm would help get the bandwidth close to 800kHz.
Should also point out that \$V_{\text{th}}\$ of the BS170 can be as high as 3V, so there could be units that won't properly turn on. A lower voltage part with lower \$V_{\text{th}}\$ and smaller die size, to reduce part capacitance would be a better choice.