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I am trying to design and build an antenna + LNA board.

Antenna: http://www.yageo.com/documents/recent/An_FR4_1690_2405_0.pdf

LNA: http://www.avagotech.com/docs/AV02-1237EN

The antenna is specced to run at 168 MHz. In the LNA documentation it provides a suggested circuit for a 500 MHz signal. The suggested circuit is below. My Antenna feeds into the left, and my output is on the right. In building the board following the suggested circuit, only my trace between my antenna and the start of the LNA circuit and the trace between the end of the LNA circuit and my output SMA are 50 ohm traces.

enter image description here

My Question is basically why isn't this working? Am I missing some vital piece of information I have no considered? Given that the circuit is designed for 500 MHz I would expect lesser performance with a 168 MHz signal, however I am unable to pick up any signals.

My test setup consists of an RF generator with an antenna attached, and a network analyzer with this antenna design attached. These two components sit a few feet apart.

I believe all of my soldering connections are correct, and I have confirmed that the board is receiving the appropriate amount of power.

An Image of My board. Dimensions are roughly 1.5"x1.25" and all of my components are 0204 size.

enter image description here

So to recap, I receive no signals on this board even when I am blasting on my RF source right next to it. I have tested other antennas to verify that the broken piece is indeed this new antenna design. Could the mismatch between the frequency used to build the recommended circuit and the frequency my board is running at really eliminate all signals? Or is there some aspect of antenna design that this novice is glossing over?

Any thoughts would be appreciated!

EDIT**

Per the suggestions below, I have modified my design to remove the ground pour and add the suggested traces to the Antenna. My new design is below. How do we feel about this. I should also state that I tested my board with the antenna placed vertically to get it away from the ground plane and I added a short wire tail to it to mimic the suggested trace outline and it gave me a signal! enter image description here

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  • \$\begingroup\$ Precisely what 47nH are you using? \$\endgroup\$ – Andy aka Nov 11 '14 at 8:31
  • \$\begingroup\$ The link is for a 22nH inductor ELJ-RF22NJFB!!!!! \$\endgroup\$ – Andy aka Nov 11 '14 at 8:37
  • \$\begingroup\$ digikey.com/product-detail/en/ELJ-RF47NGFB/PCD1918CT-ND/762147 \$\endgroup\$ – PumpkinPie Nov 11 '14 at 8:39
  • \$\begingroup\$ That's a suitable inductor for your design, no probs there. Have you checked the 3V supply is still present when you connect the PCB? \$\endgroup\$ – Andy aka Nov 11 '14 at 8:42
  • \$\begingroup\$ Yes, I have confirmed that when connected I maintain 3v and draw 70 mA \$\endgroup\$ – PumpkinPie Nov 11 '14 at 8:44
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You have a ground plane covering the entire top layer? I hope you took that into consideration when designing your microstrip transmission lines. Also, you really need to tie the top and bottom ground layers together with a bunch of vias.

I won't pretend to be an expert, but that layout looks quite horrible to me. In particular, the output trace has a odd 45° join that I cannot see any reason for, and the stub to the 47 nH inductor is a bad idea.

You should rotate the amplifier 90° counter-clockwise, so the signal travels straight down from the top input to the bottom output. Right now, the signal makes two 90° turns for absolutely no reason.

Also: Place the bypass caps as close as physically possible to the device.

Furthermore, you have a bottom ground plane (the bottom layer pretty much has to be a ground. It is a ground, right?) That being the case, why are you routing any ground traces?

As an example, here is a mini-circuits eval-board for a similar part:

enter image description here

Some things to note:

LOTS of vias. Each ground connection uses multiple vias. Multiple vias are critical for low-impedance ground connections.

The controlled-impedance trace is routed right up to the part. If you have to reduce the trace to connect to the part, do it as close as possible, and ideally have a gradual taper.

Here is another, similar eval board:

enter image description here

In this case, the amplifier is in a SOIC-8 package, but the same things are true. There are 14 vias just for the amplifier!

In general, I'd say avoid the top copper pour unless you absolutely need to have it for properly controlling impedance. The top copper results in something called a coplanar waveguide, which means you can get away with slightly narrower traces for the same impedance, but it also means you need to tie the two grounds together.

Here is the eval-board for a mini-circuits SP6T RF switch that uses coplanar waveguides:

enter image description here

Note the MASSIVE number of vias. This is called "via stitching", and is required for proper RF behaviour when using coplanar waveguides above a ground-plane.


Update:

Doodle-CAD layout:

enter image description here

It's crude, but it's a first-past at how I'd lay out that board. I don't pretend to be an expert, but I've had decent success with the boards I've done.

Critically, the grounding is important. It's pretty difficult to have too good a ground, but it's easy to have too poor a ground, so err on the side of "Ground all the things".
The one potential concern here is that grounding like this can cause issues with soldering during assembly. I've done even more aggressive via stitching, and assembled the resulting boards without issue using the hot-plate reflow practice, but depending on your assembly process, the huge thermal connection to the ground-plane could be an issue for solderability.

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  • \$\begingroup\$ Thanks for your help so far! Based on your recommendations I made some changes. I have a ground plane on the bottom layer (in blue) with vias to my various components. See link i.imgur.com/haPN90B.png \$\endgroup\$ – PumpkinPie Nov 12 '14 at 8:28
  • \$\begingroup\$ @PumpkinPie - Add LOTS more vias. Put the biasing inductor as close as possible to the device pin (ideally, have right-angled to the trace going to the output capacitor. Move the 240Ω resistor much closer, and stitch the bypass capacitors to ground with several vias per part. Also, make sure you have several vias per ground pin for the actual amp. \$\endgroup\$ – Connor Wolf Nov 12 '14 at 8:32
  • \$\begingroup\$ If you're using edge-launch SMA connectors, the bottom side should also be connected to ground (it doesn't look like it is in your image). Also, how did you chose that huge trace-width? \$\endgroup\$ – Connor Wolf Nov 12 '14 at 8:33
  • \$\begingroup\$ Is there a recommended size for the vias? \$\endgroup\$ – PumpkinPie Nov 12 '14 at 8:33
  • \$\begingroup\$ They are edge mount SMA and they are connected to ground on the bottom, just doesnt show it in the image. For the large trace widths I chose those dimensions to get a 50 ohm trace given the dimensions and materials used by the board manufacturer. \$\endgroup\$ – PumpkinPie Nov 12 '14 at 8:36
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Are your antennas mounted on the recommended evaluation PCB? Have you checked the gain of the amplifier? It shouldn't be much less than the stated gain at 500MHz.

You need to consider the link budget. IE, what is the signal generator output, the amplifier gain and the sensitivity of the network analyser. A couple of feet is going to result in significant attenuation. See http://www.radio-electronics.com/info/propagation/path-loss/free-space-formula-equation.php

The antenna gain is not stated. Typical gain for chip antennas, maybe -15dbi. Throwing that in the calculator suggests 47db loss at a 1mtr separation.

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Your PCB layout does not look anything like the reference layout given in the antenna documentation. You have a solid ground plane under the antenna, and you have one end of the antenna chip shorted directly to ground.

Note that in the reference layout, the only part that's grounded is the 7mm area in the lower left that the shield of the cable connects to. All of the other copper areas are isolated from ground — in fact, they are actually functional parts of the overall antenna assembly, and should be duplicated as closely as possible. Any ground "pour" on your PCB should be kept well away from them.

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  • \$\begingroup\$ So the far end of my Antenna is actually isolated from Ground, but I have not duplicated any of the PCB tracks in the antenna document. What do you think is the minimum distance between the antenna setup and a ground pour? Or do you think for a design of these dimensions that I should just try to forgo the ground pour entirely? \$\endgroup\$ – PumpkinPie Nov 11 '14 at 17:03
  • \$\begingroup\$ @PumpkinPie - I think if you have not looked into what is required to properly control your impedances, you have a lot of research you need to do first. \$\endgroup\$ – Connor Wolf Nov 12 '14 at 7:21

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