I am trying to phase lock a 74HC-based digital circuit from a clock reference at 10~15MHz pulse repetition rate. The pulse width is around 400 picosecond. The peak voltage is sometimes below 700mV, depending on the coax cable length.
I don't actually mind the shape of the clock; even a conversion to sine wave like waveform is accepted, as long as I can drive my 47HC based electronics from this weak pulsed trigger. Should I look for designs to pre-condition the clock reference? I generally aim at a low-cost solution, else it would be an over-kill for my digital board (~$50).
Circuit diagram of the clock reference
The clock source is generated by a photodetector. The following shows the internal circuit layout provided by vendor. I cannot modify the circuit inside the photodetector as it will void the warranty terms.
Things I tried:
1. 74HCU04 amplifier
The following layout from this blog removes the pulses instead of amplifying it:
2. NPN class-C amplifier
I observe ringing at around 300mVpp but I cannot see the pulses:
[EDIT] Things achieved so far based on answers
George Herold reminded me that my current-sourcing signal needs to be converted to a voltage before amplification. So I now connect the 50Ohm termination resistor in series with my amplifier gates.
As I only have HCU04 at hand, I tinkered with the capacitor-resistor combination to amplify the signal at multiple stage:
In stage 2 and 3, I have to AC-couple the signal so that it can be biased at VCC/2 at which amplification effect is the largest. Otherwise the baseline of the pulse signal will be drifting away to either VCC or GND where there will be no amplification. The 4th stage works simply like an inverter to give me a rising edge.
Is there any design rule for this? I am afraid the result may not be reproducible on PCB layout.