# ARM watchdog reset

I have an MP3 development board I picked up from sparkfun that runs off the LPC2148 ARM processor. In looking through the code, I see a function to force a watchdog reset. My question is, how do you figure out what values to feed to the watchdog register? I looked through the LPC2148 data sheet and couldn't figure it out. I don't just want to use other people's code, I want to understand why they did what they did and how they figured out what to do.

This is the code I use for an LPC2148:

WDTC = 0x00000FFF; // very short timeout

WDMOD = 0x03; // watchdog resets CPU

WDFEED = 0xAA; // start watchdog

WDFEED = 0x55;

• 0xAA and 0x55 are often used in this sort of code which affects an application in a big way, as they are unlikely to be encountered during normal code execution. - Leon Heller – Kortuk Jul 22 '12 at 22:08

From the LPC23XX datasheet, should be the same for LPC2148 ::

Watchdog feed sequence register. Writing 0xAA followed by 0x55 to this register reloads the Watchdog timer with the value contained in WDTC.

It sounds like you're trying to force a watchdog reset, not keep the watchdog from resetting you. This is accomplished by a misfeed: feeding the watchdog 0xaa followed by a value OTHER than 0x55. Example:

WDFEED = 0xAA;    /* Correct feed... */
WDFEED = 0x00;    /* ... Oops, insta-reset! */