I must be blind... I'm trying to decide which of the '165, '166, and '597 shift registers is appropriate/inappropriate for a SPI input shift register. All are 8-bit parallel in.
- HC165: http://www.nxp.com/documents/data_sheet/74HC_HCT165.pdf
- HC166: http://www.nxp.com/documents/data_sheet/74HC_HCT166pdf
- HC597: http://www.nxp.com/documents/data_sheet/74HC_HCT597_CNV.pdf
It looks like the HC165 has a latching asynchronous load input (parallel load triggered by a pulse), the HC166 has a clocked synchronous load input (parallel load triggered by the same clock edge as the serial shift, when load enable is asserted), and the 597 has a separate set of load registers.
Can anyone add anything to the differences, or suggest which might be the most appropriate for SPI? (my gut call is the HC165, with the parallel load triggered by the inverted SPI CS line, and I'd have to add a 1-gate tristate driver for the MOSI signal)