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We are trying to read analog voltage supplied to two channels simultaneously using ADC10 and DTC.

We are not getting the results of conversions. Our code is as follows:

ADC10CTL1 = INCH_2 + CONSEQ_1;
ADC10CTL0 = REF2_5V + SREF_1 + ADC10SHT_2 + REFON + ADC10ON + ADC10IE;
ADC10AE0 |= 0x06;
ADC10DTC1 = 0x02;
ADC10SA = 0x200;                        // Data buffer start

while (1)
{
    ADC10CTL0 &= ~ENC;
    while (ADC10CTL1 & BUSY);
    ADC10SA = 0x200;
    ADC10CTL0 |= ENC + ADC10SC; //Sampling and conversion start
     __bis_SR_register(CPUOFF + GIE);        // LPM0 with interrupts enabled
}

and, the ISR is:

#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{ int * read = 0x200;
//code that reads from the location 'read'
 __bic_SR_register_on_exit(LPM3_bits);        // Clear LPM3 bit from 0(SR)
}

While we are getting the results back at AP, they do not show the correct value, and the value doesn't change if the supplied voltage changes. How do we make sure that an interrupt is generated only when the conversion is complete?

Thanks a lot for your time.

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... you could start by using the ADC10 interrupt vector instead of the timer0 interrupt vector ... it also looks like you're going into LPM0 at startup then switching to LPM3 after the first interrupt wakes you up (just reading comments here) ...

See section 22.2.10 of the manual, excerpted here for convenience.

One interrupt and one interrupt vector are associated with the ADC10 as shown in Figure 22-16. When the DTC is not used (ADC10DTC1 = 0) ADC10IFG is set when conversion results are loaded into ADC10MEM. When DTC is used (ADC10DTC1 > 0) ADC10IFG is set when a block transfer completes and the internal transfer counter 'n' = 0. If both the ADC10IE and the GIE bits are set, then the ADC10IFG flag generates an interrupt request. The ADC10IFG flag is automatically reset when the interrupt request is serviced or may be reset by software

I would also consider perusing the TI-provided code examples for your particular chip variant.

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