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I'm using a PIC32MX250F128B for a project to drive several digital outputs; I need to control the digital output for about 13-14 pins. (using the code below).

  • These pins work: RA0, RA1, RB0, RB1, RB2, RB3, RB10, RB11, RB13, RB14, RB15

  • These pins do not: RA2, RA3, RA4, RB4, RB5, RB7, RB8, RB9

By "not work" I mean there is not output voltage at all, just a disconnected state (whereas the "working" pins successfully toggle high to low). My theory for why the pins aren't working is that the pins require an extra peripheral register selection of some kind to configure them to function as General I/O pins. I'm not sure if that's correct, but googling and testing hasn't turned up any results, and the datasheet has not been very helpful.

void main() {
  mPORTBClearBits(BIT_4 | BIT_5 | BIT_7 | BIT_8 | BIT_9);
  mPORTBSetPinsDigitalOut(BIT_4 | BIT_5 | BIT_7 | BIT_8 | BIT_9);
  mPORTAClearBits(BIT_2 | BIT_3 | BIT_4);
  mPORTASetPinsDigitalOut(BIT_2 | BIT_3 | BIT_4);

  while(1) {
    mPORTBToggleBits(BIT_4 | BIT_5 | BIT_7 | BIT_8 | BIT_9);
    mPORTAToggleBits(BIT_2 | BIT_3 | BIT_4);
  }
}

My config bits are set to the standard values (I can post the entire main.c file if necessary. EDIT: see below). Why is this subset of pins giving me so much trouble?

EDIT: here are my config bits

#pragma config FNOSC = FRCDIV           // Oscillator Selection Bits (Fast RC Osc w/Div-by-N (FRCDIV))
#pragma config FSOSCEN = ON             // Secondary Oscillator Enable (Enabled)
#pragma config IESO = ON                // Internal/External Switch Over (Enabled)
#pragma config POSCMOD = HS             // Primary Oscillator Configuration (HS osc mode)
#pragma config OSCIOFNC = ON            // CLKO Output Signal Active on the OSCO Pin (Enabled)
#pragma config FPBDIV = DIV_1           // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/1)
#pragma config FCKSM = CSDCMD           // Clock Switching and Monitor Selection (Clock Switch Disable, FSCM Disabled)
#pragma config WDTPS = PS1048576        // Watchdog Timer Postscaler (1:1048576)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable (Watchdog Timer is in Non-Window Mode)
#pragma config FWDTEN = ON              // Watchdog Timer Enable (WDT Enabled)
#pragma config FWDTWINSZ = WINSZ_25     // Watchdog Timer Window Size (Window Size is 25%)
// DEVCFG0
#pragma config JTAGEN = ON              // JTAG Enable (JTAG Port Enabled)
#pragma config ICESEL = ICS_PGx1        // ICE/ICD Comm Channel Select (Communicate on PGEC1/PGED1)
#pragma config PWP = OFF                // Program Flash Write Protect (Disable)
#pragma config BWP = OFF                // Boot Flash Write Protect bit (Protection Disabled)
#pragma config CP = OFF   
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2 Answers 2

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I suspect it's your config bits, the one thing you didn't post.

  • RA2/3 are the main oscillator pins.
  • RB4/RA4 are the secondary oscillator pins.
  • RB5/7/8/9 are JTAG.

All of those pins are affected by the config bits.

Edit: Now we have your configuration bits available, I can confirm it:

  • #pragma config POSCMOD = HS // Primary Oscillator Configuration (HS osc mode)
  • #pragma config OSCIOFNC = ON // CLKO Output Signal Active on the OSCO Pin (Enabled)
  • #pragma config FSOSCEN = ON // Secondary Oscillator Enable (Enabled)
  • #pragma config JTAGEN = ON // JTAG Enable (JTAG Port Enabled)

All those being on, or not set specifically to disabled, will be overriding any and all other functions on those pins.

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  • \$\begingroup\$ It worked, I disabled JTAG and secondary oscillator. I didn't realize JTAG was using all of those pins. Thank you very much. I would upvote your answer, but I'm a little low on reputation \$\endgroup\$
    – JBrown
    Nov 22, 2014 at 17:42
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See the tables on page 60 and 61 on the PDF you linked for all the register than can affect port A or port B, and make sure they're all correct (about 20 registers total). For example, for PORTB:

enter image description here

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