How to design a 3V3 device to be safely programmed by 5V ISP

Question

I'm designing my first 3V3 circuit with ATmega8. While the uC itself supports both 5V and 3V3, some of components do not. I'm going to place ISP socket on board and I'm wondering how to ensure that a 5V programmer won't damage lower voltage components. My first idea is:

• route Vcc from ISP through 3V3 low-drop regulator (already available on board) and add a diode to protect the programmer from being powered backwards with 12V which appears on board "before" the regulator,
• add voltage dividers on MOSI and SCK lines which, if I understand well, are always programmer's outputs and circuit's inputs.

Does it make sense?

In case someone connects a programmer already working with 3V3, the dividers will drop it to approx. 2.18V. Won't that be too low to maintain correct logic levels?

Answer 1

As Ignacio stated in the comments. Use a level shifter.

That's one example. They come in lots of forms depending on whether you need single direction shifting or bi-directional shifting with or without automatic direction sensing.

For SPI, which it sounds like you're using you can get away with single direction shifters. But for general purpose, super simple bidirectional, you can make them out of discrete components.

Image from here.