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Is there any rule-of-thumb for comparing processor speed based on architecture?

I'm researching single-board computers, and I'm trying to compare ones using ARM processors (e.g. Beaglebone Black, PCDuino, UDOO) to ones using x86 (e.g. Galileo). The ARM ones typically have a higher speed (e.g. the BBB runs at 1GHz whereas the Galileo runs at 400MHz). However, I know the x86's complex instruction set can do certain operations faster, while ARM's reduced instruction set uses less power but also requires more work for certain calculations.

Is it fair to say speed A on x86 is equivalent to speed B on ARM? e.g. Is a 1GHz ARM processor "about as fast" as a 400MHz x86 processor?

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  • \$\begingroup\$ All ARM processors are not equivalent, the ISA is highly modular, and comes in many versions (ARM v1, v2, v3, v4, v5, v6, v7, v8), has optional FPU, NEON, DSP, etc.... The same is true with x86 (SSE, SSE2, 3, 4, 5, 3D Now, etc...). In basically all cases, you're not comparing architectures, you're comparing specific implementations of different architectures. There really isn't a general case here. \$\endgroup\$
    – Connor Wolf
    Commented Nov 27, 2014 at 2:48
  • \$\begingroup\$ @ConnorWolf, I suspected that might be the case. You can add that as an answer. \$\endgroup\$
    – Cerin
    Commented Nov 27, 2014 at 3:02
  • \$\begingroup\$ Check the MIPS (Million Instructions Per Second - normalized to 1 MHz) rate for each one you are researching and multiply by the clock. Then you have to make some estimates based on the job to be done. If your time critical code will run mostly from cache, then use the raw MIPS. If it will have a lot of misses and run from RAM and Flash, you need to know the latency and add clock cycles. Note that due to some really nice pipelining, the newer ARMs all can do more than one instruction per second. You will see numbers like 1.1 or 1.4 MIPS. Comparing to x86 I think you need benchmarks. \$\endgroup\$
    – C. Towne Springer
    Commented Nov 27, 2014 at 7:43
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    \$\begingroup\$ @C.TowneSpringer "the newer ARMs all can do more than one instruction per second" I think most MCUs can manage that ;-) \$\endgroup\$
    – Roger Rowland
    Commented Nov 27, 2014 at 8:17
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    \$\begingroup\$ @RogerRowland Ouch! Another typo I can't edit :-) More than one per cycle of course. I was thinking of the old calculator you have to crank with your arm ;-) \$\endgroup\$
    – C. Towne Springer
    Commented Nov 27, 2014 at 20:28

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This can be done if the target application is defined. The easy way is to Write the code to solve a specific problem in a high-level compiled language and use a compiler that uses the full instruction set of the target. Then run the solution and benchmark it. This can be done even between for example 4 bit CPUs with no cache and high end pipelined 64bit CPUs. Don't forget that most modern so called CPUs are actually systems on chip SoC that include multiple cores, dedicated peripherals and coprocessor alike as the GPU and those can be used to boost the application speed. Also one of the most important things is code optimisation, you can use assembly for some applications but it is rarely used these days because it significantly increases the development cost so, the compiler is critical you can actually have a faster CPU running your application slower because of this.

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