Suppose I have a small (4cmm x 4cmm) 4-layer PCB with standard stack-up of Signal-Vcc-Gnd-Signal. The board is dominated by two QFP-100 (FPGA and uC) on both on top and bottom side of the board with various traces running underneath each of the chips.
Both FPGA and uC are powered from the same 3.3V rail. Now I'm whether I should
- simply connect each power pin and associated capacitor to the Vcc plane by vias OR
- form a Vcc island on top and bottom side under the ICs and connect this island to the Vcc plane at one point, possibly via a chip bead. The decoupling caps would then connect to the Vcc island and have the other leg connected to the Gnd layer by vias. OR
- form a Gnd island on top and bottom side under the ICs and connect it on a single place to the Gnd plane. Each Gnd pin would then connect to the Gnd island and each Power pin would be tied to the Vcc layer by vias. Same for the decoupling caps.
In either of the two last cases the island would inevitably contain some cuts and holes.
There is no exceptionally sensitive analogue circuitry on the board except for the ADC inside the uC. Still I would like to have the supply/ground as quite as reasonably possible.