# DC output of differential amplifier with active load

I've been looking around for some kind of explanation on how to get the output DC voltage on a single ended differential amplifier with active load like the one in the image

It's just that i don't really understand how the DC voltage is fixed there. It seems it's kinda randomly set, because neither M4 or M2 have their VDS fixed.

M5 provide the bias current $I_{Q}$ for the differential pair formed by M1 and M2. When a common-mode voltage of $v_{cm}$ applied to M1 and M2's gate, the current $I_{Q}$ splits evenly between M1 and M2. Just this current biases the transistors.