On various places across the net, I read that (some) synthesis tools do not respect VHDL libraries. These tools just throw all entities and packages into a single namespace, so that you cannot have mylib.someEntity
and yourLib.someEntity
in the same project. I know that Altera Quartus used to have that problem last time I checked (but that was a while ago). I'm afraid that some of the info on usenet archives might be outdated, so I'm looking for up-to-date info.
I also believe most simulators support libraries today.
My question: Which synthesis tools do support VHDL libraries and which don't? If there are any simulators that do not support libraries, I'd also like to hear that.
Can you please also mention the version numbers of the tools, for future reference?