# transistor level design of Op-amps

How do we realize the design of a simple Op-amp with Bipolar Junction Transistors or MOS Field Effect Transistors alone? I mean I understand the need for differential amplifiers for providing a differential mode gain and I understand the requirement of Darlington pair as voltage amplifiers of the differential gain, but what about the others, how do they integrate the common mode gain into the equation as well.

• Have you looked at any of the internal schematics of op-amps that are freely available online? For instance, the LM741: learningaboutelectronics.com/images/… Dec 12 '14 at 14:33
• Wikipedia explains this very well. Worth a read before asking a more specific question. en.wikipedia.org/wiki/Operational_amplifier Dec 12 '14 at 14:38
• yes, I understand that Q1 and Q2 serve as a differential amplifier. Q15 and Q17 look like a darlington pair. I understand that the output of the differential passed through the darlington would help me get an amplified Differential gain, but what about the common mode gain and how do I add it to the differential gained voltage. The schematic confounds me totally, kindly give me a hint as to what each transistor is doing or in pairs and I will try and understand the working, if I have doubts I can get back to you... Dec 12 '14 at 14:39
• I f you want answers to that kind of question, you should ask that question. Dec 12 '14 at 14:41
• @akellyirl: Thanks, Will go through and let you know if I have any queries :) Dec 12 '14 at 14:41

The differential amplifier is what gives you the common-mode rejection. Differential gain implies common-mode rejection.

The high input impedance also comes from the input stage. If FETs are used, the high resistance is a property of the gate of the FET. BJTs multiply the resistance of the bias current source, which is pretty high to begin with. There's nothing particularly exotic about this.

Low output impedance can be obtained by using a common collector or common drain amplifier for the output stage.

The inverting input follows the voltage of the non-inverting input when there's negative feedback. This happens because the op amp has a very high differential gain. The basic feedback equation is:

$$G = \frac{A}{1 + A\beta}$$

G is the closed-loop gain -- for instance, the gain of an inverting amplifier configuration. A is the open-loop gain, which is the differential gain of the voltage between the two inputs. $\beta$ is the feedback ratio, which is the fraction of the output voltage that gets fed back to the inverting input. When A is very large, the equation reduces to:

$$G = \frac{1}{\beta}$$

That's all an op amp is -- a differential amplifier with a very large gain and a large input impedance. Everything else is feedback.

If you want to learn more about op amp construction, I'd suggest learning about basic transistor amplifiers first. This will give you a better understanding of input/output impedance, gain, and the role of feedback.

• Two comments: (1) The mentioned gain formula applies to the non-inverting operation only. For inverting operation, the open loop gain A is to be multiplied with a damping factor (R2/R1+R2). (2) The high input resistance for differential signals primarily results from a small quiescent DC current in the first stage. Regarding the influence of the bias current source in the common emitter path, one should not overlook the fact that in parallel to this current source we have another dynamic resistance: the small/moderate input resistance at the emitter node of the 2nd transistor.
– LvW
Dec 12 '14 at 16:07

The basic differential front end of a opamp works like this:

On a single chip, the resistors would be current sources, usually a current mirror. Either way, think of how this works. Q1 and Q2 are built to match as closely as possible. Assume they are identical, and consider what happens as IN+ and IN- are moved up and down together. Being identical with identical base voltages, they will share the current equally. Note that absolute base voltage has nothing to do with this, as long as there is sufficient C-E voltage available. Half the current appears across each resistor, and the output voltage stays the same.

If IN+ goes a little higher than IN-, then Q1 will take more of the current, Q2 will take less of the current, which means R2 will have less current thru it and less voltage across it, which means OUT goes up. From there, OUT is amplified, integrated, and used to drive the high-current output stage.

The integrator is a important part of a opamp. It puts a single dominant pole into the open loop transfer function, which gives the opamp predictablility and gurarnteed stability over a specific set of operating conditions. The rest of what opamps do is accomplished with external feedback. In any real "opamp" application (as apposed to "comparator"), this external feedback is a essential part of overall operation.

The same Q1/Q2 differential pair configutation works with FETs, or darlingtons too, but those are just implementation details that effect offset voltage, input impedance, and other tradeoffs.

• How is the high input impedance, low output impedance and most importantly the virtual voltage following of the inverted pin possible, from what I understand from the external circuitry, the voltage sinking without the current sinking, in case of a feedback, IS the most exotic part of the op-amp. Dec 12 '14 at 15:11
• @ubunt: It's unclear what you are asking, but with BJTs as shown above, high input impedance is achieved by the input current being low, which comes from a combination of the current source shown having a low value and the transistors have gain. Darlingtons give more gain and therefore less input bias current, but more offset voltages. FETs get around this altogether by not being current-controlled devices in the first place. Dec 12 '14 at 17:54

If you are looking for some reading material on analog design at the transistor level, an excellent place to start is the free book PDF "Desiging Analog Chips" by Hans Camenzind.

http://www.designinganalogchips.com/

Written by the designer of the world famous 555 timer, he covers practically all the core analog blocks at the transistor level in a practical manner.