I am working on implementing a polynomial divider the operation is as follows: Check MSB of Numerator: if 1 XOR with Denom then shift Denom right if 0 Num is the same and Denom also shift right
When doing the following shift for the Denom the new MSB of the numerator to compare with is the old MSB-1 Therefore I have implemented a Down counter that starts with M downto 0 at each step the new MSB is the value read from the counter
on VHDL Implementation I got an error on the following
the obtained error is: type identifier with "ctr_reg" does not agree with its usage as "natural type"
How can I solve this? should be done with a variable inside my process? And what is the hardware translation of a variable used in such case
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; use ieee.numeric_std.all; use work.classic_multiplier_parameters.all;
Error From updated statement: