8
\$\begingroup\$

Considering I made an architecture to do some specific thing, wrote in vhdl, for example.

Can I 'burn' it in a fpga chip, forever? Or how should I do it, protecting the intelectual property knowing the fact it can be read from the serial flash memory?

\$\endgroup\$
12
\$\begingroup\$

Xilinx Spartan 3AN FPGA's have internal flash making them nonvolatile. Your question is actually multiple questions.

1) Are FPGA's volatile or non-volatile? Most are volatile, requiring the configuration bitstream to be read into the FPGA from an external nonvolatile storage device at every power on. There are some that are nonvolatile. Like the Xilinx S3AN I mention.

2) How do you protect the configuaration bitstream? There are multiple answers to this question.

You can encrypt the bitstream; which means to say that the bitstream that is stored on the above discussed nonvolatile storage device is a unique ciphertext that can only be decrypted by the single fpga with the appropriate key. This will protect the bitstream's functionality from being discovered by reverse engineering. That is to say that even if the enciphered bitstream is able to be extracted from the nonvolatile storage device, either in-situ or more destructive means, sense will not be able to be made from the extracted file since it is encrypted.

You can also set the bitstream to be prohibited from being readback. The JTAG interface that one uses to program an FPGA at debug time can generally be used to read the configuration bitstream back out of the fpga. Setting the NO_READBACK option prohibits this.

\$\endgroup\$
  • 1
    \$\begingroup\$ How can the FPGA itself read the encrypted bitstream if it's not possible to decrypt it? The answer is of course that it is possible to decrypt the bitstream. It's just a bit more difficult because it's obfuscated. \$\endgroup\$ – ntoskrnl Dec 16 '14 at 12:16
  • \$\begingroup\$ Huh? The plaintext bitstream (call it Bpt) is encrypted by an encryption function Ek() that takes the plaintext and a secret key (call it Key) to create a ciphertext bitstream (call it Bct), so Bct = Ek(Bpt, Key). This gets stored and at boot time streamed to the FPGA, which knows the secret key, so it is able to decrypt it, Bpt=Ek(Bct, Key). Without the Key, a third party cannot perform the decryption operation. Given processing time and other cryptoanalytic tools, the third party could potentially figure out the plaintext, but not through the intended decryption process. \$\endgroup\$ – Jotorious Dec 16 '14 at 14:41
  • \$\begingroup\$ The attacker could simply find out the key as well and proceed to decrypt the plaintext. I guess the key can be made pretty difficult to recover from hardware (e.g. smart card), but if it's stored in some kind of regular memory, it shouldn't be harder than recovering the ciphertext. \$\endgroup\$ – ntoskrnl Dec 16 '14 at 15:47
  • 1
    \$\begingroup\$ Right, encryption is only as secure as the key is secure. I'm not able to speak to non-Xilinx FPGAs, but on Xilinx FPGAs the key is not recoverable through non-invasive/non-destructive measures. \$\endgroup\$ – Jotorious Dec 16 '14 at 16:41
  • \$\begingroup\$ This link covers alot of this discussion: xilinx.com/support/documentation/application_notes/… \$\endgroup\$ – Jotorious Dec 16 '14 at 16:43
7
\$\begingroup\$

It is possible to find FPGAs with an integrated non-volatile program memory. For example, Microsemi (formerly Actel) specializes in this type of device.

Other vendors offer the option to mask-program an FPGA. For example, Xilinx calls their mask-programmed devices "EasyPath" FPGAs. This does require an NRE payment, as far as I know, so it isn't appropriate for situations where you might need to update your design. (Hat tip to alex.forencich for the correction)

\$\endgroup\$
  • 2
    \$\begingroup\$ EasyPath FPGAs are not mask programmed, they are custom tested for only your bitstream, reducing the testing costs and increasing the yield (they can tolerate defects in components that your design does not use). The FPGA still requires a config flash with your design loaded in order to work. If it was actually mask programmed, the NRE would be enormous. \$\endgroup\$ – alex.forencich Dec 16 '14 at 9:49
6
\$\begingroup\$

I can at least speak for altera, I assume Xilinx will have something similar. They have the option of encrypting the file you put into external flash or EEPROM. Then you load the decryption key into the altera part, using its non volatile or battery backed key storage.

Since you can't read the key out it protects your ip. They were losing design wins to Asics because they couldn't protect peoples IP so this is a pretty common feature.

http://www.altera.com/devices/fpga/stratix-fpgas/about/security/stx-design-security.html

\$\endgroup\$
0
\$\begingroup\$

The only way you could accomplish this is by purchasing a separate Flash module (if you dont already have one on the PGA) and loading your code into ram, however this is not recommended for all the hassle, just purchase something like a CPLD if you plan on reprogramming at a later point or a ASIC if you have no intentions of reprogramming it again.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.