I am currently routing a 4 layer PCB and I was wondering how I connect the ground and power planes to the connector and components that need them. Do I simply leave the two planes without routing on them? If so how can a connection be created between those planes and the components.
Use a via.
Presumably the power planes are internal. Use a via to connect from the signal planes (top and bottom) to the internal power or ground plane. The via can be completely through the board but only connected to the starting trace and the plane you want.
Depending on your software you'll probably just need to be routing a signal of the same name as the power plane and once you make the via, it will connect automatically.
Connection to a ground plane is done through a via. In case of surface-mount component, there is separate via connected to the surface-mount pad. In case of throughole component (pictured below), the pin is soldered into the via.
Notice that in this case, ground plane is connected to the via. Vcc plane has an annular clearance around the via, and so it's not connected to the via.
When soldering throughole components, a plane can act a heat sink. That makes soldering more difficult. Thermal relief pattern makes soldering of plane-connected pins easier.
(Source of drawings: Nick's introduction to PCB design workshop.)
For through-hole components, pins connected to the Vcc or GND nets will be automatically connected to the power or ground planes as needed - the planes will have no clearance around the hole, so will connect to the through-hole plating.
For SMD components, connect the ground or power leads to short traces. A via placed on those traces should automatically connect to the appropriate plane.
If you put a big copper plane for ground on layer 2 and another one for power on 3 and assign them to the ground and power nets respectively, PADS will automatically connect them when you flood the copper. All of the through holes will get connected using the copper "spokes" for thermal relief. The SMD pads on the top (and possibly bottom) layers would need additional vias.