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circuit

I am trying to make a JK flip flop circuit in proteus but 2 of the nand gates does not seem to be working. There are no errors provided. Two of the 2-input nand gates does not seem to show output when one of the signal is neither red or blue.

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  • \$\begingroup\$ In what way are they not working? What behavior did you expect and how was the result different? (Also, a NAND gate with one input tied low will never change its output, maybe that's your problem?) \$\endgroup\$ – The Photon Dec 18 '14 at 6:34
  • \$\begingroup\$ What do you mean with "one input tied"? \$\endgroup\$ – Kyle Dec 18 '14 at 8:29
  • \$\begingroup\$ "Tied low" means connected to 0V, ground, earth, etc. - a digital 0. When one of the inputs of a NAND is 0, the output will always be 1, no matter what the other inputs are. As you can see in your diagram, all NANDs have one input 0, so no matter what you put on the other inputs, the outputs of the NANDs won't change. \$\endgroup\$ – user17592 Dec 18 '14 at 10:06
  • \$\begingroup\$ If one of the input is 0 (like one in the top right nand gate) and the other is 1 then the output should be 1 then why is the output not 1? (I know that red is 1 and I assume that the grey is 0) \$\endgroup\$ – Kyle Dec 18 '14 at 10:25
  • \$\begingroup\$ I also given no input just put an AND GATE and connected voltmeter at output and given no input to AND Gate even then it displayed +5V at output. \$\endgroup\$ – user104684 Mar 25 '16 at 4:01
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The grey signals are "unknown", and they propagate through the gates, eventually being fed back to the input, so the unknown state persists. This is something of a quirk with logic simulators, but also something of a warning. It indicates that you may not be able to predict how the circuit powers up. In real life, the state will randomly come up as 1 or 0, and the circuit proceeds from there. But in the absolutely strict environment of the simulator, unknown is unknown.

You can get the circuit to "stabilize" by temporarily forcing those signals high or low (with more parts required). You may also find some help by reading this question

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  • \$\begingroup\$ Try placing a 10k resistor to Vdd on both NAND_2 inputs which are grey. Technically I'd consider this a "race" condition as gbarry mentions - unpredictable at start-up. \$\endgroup\$ – rdtsc Mar 25 '16 at 14:26
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Instead of connecting 'J' and 'K' to the ground or power, try to use the "toggle" component.

Also the circuit diagram should be looking like this : http://upload.wikimedia.org/wikipedia/commons/f/ff/JK-FlipFlop_(4-NAND).PNG

It seems another probability could be that you deleted the info on the NAND gate so proteus does not recognize the component. Try deleting and replacing with another one, this time do not change any names.

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  • \$\begingroup\$ I tried what you suggested and I think the problem is that one of the input of the 3 input nands is on grey. Is that suppose to happen? \$\endgroup\$ – Kyle Dec 18 '14 at 8:35
  • \$\begingroup\$ I checked your circuit again and it seems perfectly fine except 'J' and 'K' inputs, unless you are not trying to make a toggling function of course. The gray color is displayed when there is no logic value (like an open circuited leg). I also tired to simulate my own circuit and gave me an error. Proteus seems unstable for this application. But you can use the component of "Dual JK Master-Slave Flip Flop". If you like I can recommend another simulation program "EveryCircuit", it is an android application. \$\endgroup\$ – Orkun Dec 18 '14 at 9:31
  • \$\begingroup\$ isn't an open circuit considered as 0(zero) logic value? \$\endgroup\$ – Kyle Dec 18 '14 at 9:33
  • \$\begingroup\$ Yes, I totally agree with you, but the Proteus works like that. \$\endgroup\$ – Orkun Dec 18 '14 at 9:37
  • \$\begingroup\$ so is there anything you can suggest with this? \$\endgroup\$ – Kyle Dec 18 '14 at 9:37

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