# How does this current monitor circuit works?

Can you please explain how can I analyze and equate its feedback? I have simulated it in LTspice as follows:  I have tried for 0.5A and Vout is precisely 2, half of above, so it is working, despite not according to the 5V/A expected. (Where is that missing volt?)

Vout and Vdrain are overlapped, and obviously Id = Is.

Also, I have noticed that in any case, Vgate (op amp output) is always saturated to Vsupply, so how is there any feedback? I thought from Vout equation that gain is R1/R2, then Vgate over R3 dictates sensitivity, but it doesn't seem like that.

Can you analyze it step by step to eq.: Vout = (R1/R2) * R3*Il?

EDIT: new simulation:  Values:

V(v+)-V(v-) = 550.4 mV

V+ = 4.55 V

V(vout) = 4.597 V

V(gate) = 5.191 V

V(gate)-V(vout) = 593.77 mV

I(R1) = 5.40 mA

I(R2) = 919.44542 µA

Ix(U2:OUT) = -6.323833 mA

4:

• You should have used the same reference designators as the app note. I am using app note reference designators. Does it have negative feedback? It looks like it does. Even though the feedback goes to the positive terminal, it is inverted by the transistor. So it is negative feedback. So, we can assume that the voltage at the two terminals is the same. That means that the voltage across R1 and R2 is the same. Is that enough for you to figure it out yourself? Also, is it a homework problem? I don't want to help you too much if it is homework. 2N3684 is a JFET. You used a mosfet. Try a JFET. Dec 20 '14 at 8:54

Can you please explain how can I analyze and equate its feedback?

It works on the principle of a balanced bridge (although it doesn't like like it). The load current causes a load-dependant voltage at the inverting input and the op-amp tries to match that voltage at the non-inverting input. It does this by turning on/off the FET so: -

+Vin always is trying to match -Vin.

If $I_{LOAD}$ is 1 amp then one-thousanth of one-amp is taken through the 100 ohm resistor thus +Vin = -Vin.

If +Vin is a little too high (compared to -Vin) then the op-amp output rises and turns the FET on more and more current flows thru the 100 ohm so that +Vin lowers and, on a micro-second timescale, the two inputs eventually match.

As for your circuit, try using a JFET model instead of a MOSFET model. The gate drive needed to produce the correct voltage on the output will necessarily be too high in your simulated circuit. You can prove this by trying load currents of say 100mA. With that current you'd expect to see 100uA through the 5k resistor producing a voltage of 0.5 volts - to turn the MOSFET on, the gate would need to be possibly 3 volts higher at +3.5 volts. Clearly, on a 1 amp load the voltage expectation across the 5k will be 5 volts and this won't work because your op-amp supply is only 5 volts.

With a JFET, the device can fully turn on when the gate voltage is maybe a volt below the source voltage.

• Andy, thanks for the reply, sorry the delay. I got it, but something is not right with the simulation. I switched to 2N3684, as per App. Note, still op amp V+ and V- values different from each other. Thought it could be the op amp input offset, since this is an indirect feedback and replaces for LT6003, 500uV offset max. Still have op amp V+ 500mV greater than V-, I believe because of mosfet Vge. <br/>But still makes no sense: Vgate should increase up to V+ = V-. <br/>Also, current through R1 is definitely not 1/1000 Iload. That is just (almost) true for R2.
– tfm
Dec 26 '14 at 1:04
• Moreover, current on R1 flows upwards, since V+ = 4.55, that is > than the 4.01 of V2. I have noticed that LT6003 drives all current, upward from drain and downward through R2. It makes me wonder why the FET is there, anyway.
– tfm
Dec 26 '14 at 1:09
• Man, I can't get to add images in comments... neither the <br/> to work... sorry. New simulation added at end of original post.
– tfm
Dec 26 '14 at 1:20