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I have seen circuits involving crystal oscillators connecting two capacitors between each of the crystal legs and ground. I would like to know how to design the value of these capacitors for different crystal frequencies.

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    \$\begingroup\$ For start, read section 5 of this document. Each crystal needs certain capacitance to work. To get the exact number, you should read the crystal's datasheet. Then you should take into account capacitances you're already getting from the chip and the PCB. When you get the existing capacitance, you should calculate the capacitance of capacitors which should increase the total capacitance so that it reaches the amount prescribed by the crystal datasheet. \$\endgroup\$
    – AndrejaKo
    May 21 '11 at 10:37
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    \$\begingroup\$ Not quite right! The correct load capacitance is required to ensure that the crystal operates at the stated frequency. It will probably still oscillate with incorrect capacitor values, or even no capacitors, with feedback provided by stray capacitance, but at the wrong frequency. \$\endgroup\$ May 21 '11 at 11:05
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The frequency is irrelevant, what matters is the load capacitance of the crystal. It's specified by the crystal manufacturer.

Most MCUs use a Pierce oscillator with two feedback capacitors, which are effectively in series, although they look as though they might be in parallel. You therefore need to select the capacitors that, in series, and accounting for some stray capacitance, give the required crystal load capacitance. Most MCU manufacturers have application notes on capacitor selection, as do most crystal suppliers. Here is a typical example.

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    \$\begingroup\$ Microchip has another awesome oscillator app note here \$\endgroup\$
    – ajs410
    May 23 '11 at 16:44
  • \$\begingroup\$ Although this was quite some time ago, could you elaborate on how these capacitors are effectively in series? At resonance, the oscillator (crystals) itself exhibits zero impedance, so the capacitors are effectively connected at their "top" (unpolarized) nodes. Since the other node is grounded for both capacitors, they appear to be indeed in parallel. \$\endgroup\$
    – sherrellbc
    Feb 7 '15 at 19:49
  • \$\begingroup\$ en.wikipedia.org/wiki/Pierce_oscillator#Load_capacitance \$\endgroup\$ Feb 7 '15 at 20:29

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