I'm having troubles calculating the characteristic impedance of USB/Ethernet traces for a pcb. The Saturn PCB design program calculates values where I'm not sure if they are correct. I want to use a 4 layer pcb of this kind:


The outside copper layers will be 70µm thick instead of the 18µm from the picture (the manufacturer confirmed that they can produce it). Also, εr=3,8 on outside layers.

The calculation with Saturn PCB Design gives the following values for USB:

Impedance calculation

The conductor width and conductor spacing values seem to be a bit odd. Especially the spacing is really huge, right? (TI: "Route DP/DM traces close together for noise rejection on differential signals".)

The program also shows a S/H warning in the picture.

Are these values indeed correct? Or are parameters wrong? I'm not sure about the base copper weight and plating thickness. As I want to have 70µm on outside layers, I summed the copper values (18+52=70).

What is this warning telling me? Or did I make a mistake?



1 Answer 1


The calculation looks correct, but the tracks are too wide.

For example, a single 0.75 mm track on a 0.36 mm substrate, has an impedance to ground, unbalanced, of about 49 ohms. Thus a "differential pair" any long distance apart will have an impedance of 98 ohms, without any coupling between the lines, i.e. infinite mutual impedance. It only takes a tiny bit of mutual impedance to bring the differential impedance down to 90, which is why your package puts them so far apart.

Hence the warning about spacing/height. You don't really have a differential pair, you have two single-ended lines, which as you say isn't ideal for rejection of coupled interference, or reduction of radiation.

A differential pair should have a significant mutual impedance, at least similar to or smaller than the impedance of each line to ground.

Keeping the final differential impedance constant, you can make each track narrower, raising its impedance to ground, and move them closer together, lowering their mutual impedance. This makes it more like a differential pair, less like two separate lines.

On this thin substrate you need to make the traces a lot narrower, so they can be closer together, so the mutual capacitance dominates the ground capacitance. Try 0.25 mm if your tracks can be this narrow, and see how far apart they need to be to get 90 ohms.

  • \$\begingroup\$ I've edited a bit above. What you want is each Z0 (to gnd) much greater than 45 ohms. Imagine three capacitors, one between the lines, and two to ground. The capacitance between lines should be larger than the capacitance to ground. If you make them each 0.25 mm wide, try spacing them closer, 0.5 mm or less, and Zdifferential should come down. \$\endgroup\$
    – tomnexus
    Commented Dec 27, 2014 at 14:40

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