# Straight from the datasheet: Is this really a sensible filter circuit?

Cirrus Logic CS42426-CQZ is an audio CODEC that I want to use in a custom USB sound card. You can download the datasheet from there.

On page 61, the datasheet has a recommended circuit for each A/D and D/A channel, but I fail to see the purpose of such complexity. Sure, they're converting between differential and single-ended, but there are simpler ways to do that too.

I copied their schematic into some open-source simulation software (http://qucs.sourceforge.net/) and the frequency response doesn't even match the stated purpose. But least the audible response is somewhat flat:

ADC In: (Okay, so they're relying on the CMRR of the ADC itself as part of the anti-aliasing filter. Don't like that idea.)

DAC Out:

I assume that they're actually serious about using those circuits in a real-world application, but something doesn't seem right about it. Like I said, the audible response is fairly flat, so it'll probably sound okay without cell phones or other RF, but I think I can do better with the old classics from OpAmps 101. You guys agree?

Is there really a good reason to have an audio ADC rise from nominal-gain at 20kHz to a peak at 300kHz? Or for the DAC to do the same from 20Hz to around 0.5Hz?

For completeness, here are the simulation files. Copy them into plain text files, change the extension to .sch if your system cares, and open them in Qucs:

<Qucs Schematic 0.0.18>
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<Grid=10,10,1>
<DataSet=DiffAmpIn.dat>
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<showFrame=0>
<FrameText0=Title>
<FrameText1=Drawn By:>
<FrameText2=Date:>
<FrameText3=Revision:>
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<Symbol>
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<Components>
<GND * 1 1120 480 0 0 0 0>
<VProbe In 1 1110 460 28 -31 0 0>
<GND * 1 940 640 0 0 0 0>
<C C4 5 1010 520 -26 17 0 0 "100 uF" 1 "" 0 "neutral" 0>
<GND * 1 1080 640 0 0 0 0>
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<.DC DC1 5 930 700 0 41 0 0 "26.85" 0 "0.001" 0 "1 pA" 0 "1 uV" 0 "no" 0 "150" 0 "no" 0 "none" 0 "CroutLU" 0>
<C C6 5 1230 420 -26 17 0 0 "470 pF" 1 "" 0 "neutral" 0>
<R R23 5 1310 380 -9 10 0 2 "634 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<R R22 5 1350 500 -9 10 0 2 "91 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<OpAmp OP3 5 1230 500 -26 -42 1 0 "1e6" 0 "15 V" 0>
<R R27 5 1300 570 16 -10 0 3 "634 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<C C8 5 1600 610 17 -26 0 1 "2700 pF" 1 "" 0 "neutral" 0>
<Vac V1 5 940 590 18 -26 0 1 "1 V" 1 "1 kHz" 1 "0" 0 "0" 0>
<C C7 5 1390 660 -26 17 0 0 "470 pF" 1 "" 0 "neutral" 0>
<R R24 5 1470 620 -9 10 0 2 "634 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<R R25 5 1510 740 -9 10 0 2 "91 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<OpAmp OP4 5 1390 740 -26 -42 1 0 "1e6" 0 "15 V" 0>
<GND * 1 1260 780 0 0 0 0>
<R R26 5 1310 760 -9 10 0 2 "332 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<.AC AC1 5 930 750 0 41 0 0 "log" 1 "0.1 Hz" 1 "100 MHz" 1 "901" 1 "no" 0>
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<Paintings>
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DAC Out:

<Qucs Schematic 0.0.18>
<Properties>
<View=-56,169,1878,1394,0.909091,0,88>
<Grid=10,10,1>
<DataSet=DiffAmpOut.dat>
<OpenDisplay=1>
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<RunScript=0>
<showFrame=0>
<FrameText0=Title>
<FrameText1=Drawn By:>
<FrameText2=Date:>
<FrameText3=Revision:>
</Properties>
<Symbol>
</Symbol>
<Components>
<GND * 1 40 660 0 0 0 0>
<IProbe Neg 1 370 500 -26 16 0 0>
<IProbe Pos 1 370 620 -26 16 0 0>
<R R16 5 250 620 -9 10 0 2 "0 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<R R17 5 250 500 -9 10 0 2 "0 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<GND * 1 460 560 0 0 0 0>
<R R19 5 550 680 -9 10 0 2 "1.65 kOhm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<C C2 5 550 620 -26 17 0 0 "5800 pF" 1 "" 0 "neutral" 0>
<R R21 5 730 680 -9 10 0 2 "1.87 kOhm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<R R23 5 730 620 -9 10 0 2 "887 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<R R18 5 550 440 -9 10 0 2 "5.49 kOhm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<C C1 5 550 500 -26 17 0 0 "1800 pF" 1 "" 0 "neutral" 0>
<R R20 5 730 440 -9 10 0 2 "6.19 kOhm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<R R22 5 730 500 -9 10 0 2 "2.94 kOhm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<C C5 5 890 680 -26 17 0 0 "22 uF" 1 "" 0 "neutral" 0>
<OpAmp OP1 5 870 560 -26 -42 1 0 "1e6" 0 "15 V" 0>
<C C3 5 890 620 -26 17 0 0 "1200 pF" 1 "" 0 "neutral" 0>
<C C4 5 890 500 -26 17 0 0 "390 pF" 1 "" 0 "neutral" 0>
<GND * 1 960 700 0 0 0 0>
<GND * 1 1320 560 0 0 0 0>
<VProbe Out 1 1310 540 28 -31 0 0>
<C C6 5 1090 560 -26 17 0 0 "22 uF" 1 "" 0 "neutral" 0>
<R R24 5 1170 560 -9 10 0 2 "1 kOhm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<R R25 5 1260 630 19 -8 0 3 "47.5 kOhm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "US" 0>
<GND * 1 1260 680 0 0 0 0>
<GND * 1 1040 520 0 0 0 0>
<VProbe Amp 1 1030 500 28 -31 0 0>
<.DC DC1 5 30 730 0 39 0 0 "26.85" 0 "0.001" 0 "1 pA" 0 "1 uV" 0 "no" 0 "150" 0 "no" 0 "none" 0 "CroutLU" 0>
<.AC AC1 5 30 780 0 39 0 0 "log" 1 "0.1 Hz" 1 "10 MHz" 1 "801" 1 "no" 0>
<Vac V1 5 40 610 18 -26 0 1 "0 V" 1 "1 kHz" 1 "0" 0 "0" 0>
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<Vac V2 5 190 500 -26 -50 0 2 "1 V" 1 "1 kHz" 1 "0" 0 "0" 0>
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• Did you use the right op-amps? – Andy aka Dec 30 '14 at 11:46
• @Andyaka This is simulation. I used the generic op-amp model, which is set by default for an internal gain of 1e6 and clips at +-15V. No other settings. Choice of physical op-amp doesn't matter yet. – AaronD Dec 30 '14 at 15:45
• If you must know, I'm designing my real circuit with LM833's, but that has nothing to do with this simulation. I expect any op-amp to do this in this circuit. – AaronD Dec 30 '14 at 15:49

I like this question. It's such a good example of how datasheet schematics are great for showing concepts, but not to just be used as is.

Looking at the description of the filter, it seems the main concepts are: flat response in the audio pass band, low source impedance to the ADC inputs, operation centered around a VQ of 2.7V, and attenuation of 20dB is adequate for anti-aliasing.

The 2700pF cap implies that the ADC is switched capacitor input, without any buffer. At 6MHz that's about 10 Ohms of filter output impedance. While it would be easy to use something like a lossy integrator to get the attenuation and centering around VQ, output impedance would be higher.

The amplifier arrangement, sometimes called "in the loop load compensation" is to cope with the capacitive loading on the OpAmps. Compensation like this has an adjustable Q so that the transition into roll-off can be much sharper than a simple RC. There is often some amount of tuning required to get the desired flatness. In this case though it looks like there is an error in the schematic that caused peaking with the part values.

Here's a schematic with reference designators:

You can see where I think the schematic goes wrong, with the connection of R4. But, before going into that, let's go over how the circuit should work.

With capacitive loading, an OpAmp will loose phase margin. A good OpAmp will typically have about 60 degrees of phase margin. But even a load of 100pF can cause phase margin to decline to 40 or 45 degrees, resulting in a peaky response. Addition of R2, C2, and R3 allows the amplifier to maintain phase margin with load. C2 rolls bandwidth back, increasing phase margin. R3 helps minimize phase margin loss with the addition of C4. R2 provides low frequency feedback to correct any passband error caused by R3.

Circuit response can be tuned by adjusting the value of C2. Making C2 larger will lower the Q of the filter. At low frequencies the loop of R2 dominates, but the C2 loop dominates at higher frequencies where C2 impedance is lower than R2+R3. Then the drop across R3 is uncompensated and the signal is attenuated by R3 C4 and eventual amplifier rolloff.

Consider just the non-inverting section with ideal amplifier. Transfer function, leaving out the zero of C1 R1 would be:

$\frac{\text{Vo}}{\text{Vin}}$ = $\frac{\text{C2} s (\text{R2}+\text{R3})+1}{\text{C2} \text{C4} \text{R2} \text{R3} s^2+s (\text{C2} \text{R2}+\text{C2} \text{R3})+1}$

The denominator looks suspiciously like the classical quadratic form containing Q and $\omega _o$, so derive those.

Q = $\frac{\text{R2} \text{R3} \sqrt{\text{C4} \left(\frac{1}{\text{R2}}+\frac{1}{\text{R3}}\right)}}{\sqrt{\text{C2}} (\text{R2}+\text{R3})^{3/2}}$

$\omega _o$ = $\frac{\sqrt{\frac{1}{\text{R2}}+\frac{1}{\text{R3}}}}{\sqrt{\text{C2} \text{C4} (\text{R2}+\text{R3})}}$

Since ideal amplifier was used to make things manageable, Q goes to infinity as C2 goes to zero. This won't be a problem since we only care about frequencies below amplifier bandwidth. With a real amplifier Q would fall off with amplifier gain. Pluging in values for R2, R3, and C4 we can plot Q as a function of C2.

Q decreases as value of C2 increases. If the amplifier is too peaky, just increase C2 too flatten out the response.

Now, looking at the curve, it looks like C2 of 470pF would have a Q of ~0.8. That would be pretty flat response. What happened?

In the datasheet the schematic show R4 connected to U1 output. This does 2 bad things. First, after going to some trouble to compensate out the low frequency effects of R3 and R6, connecting R4 to U1 out adds R3 drop back in. If you look at the output impedance of the filter you will see that is true. Second, it causes peaking to occur with C2 and C3 of 470pF (peak of Q is around 300pF, more or less than that Q decreases). If R4 is connected to the node with R2 R3 and C4, Q acts as expected. Also, filter output impedance will stay very low through audio passband, until rolloff and then follow C4 impedance.

• Wow, very good answer! I was about to scrap their circuit and put my higher-voltage, buffered signal through a simple AC-coupled, differential resistor divider, also keeping the input cap for charge storage and final RC rolloff. But with your explanation of how it's supposed to work, and does work if it's done right, I think I like your corrected buffer better. – AaronD Jan 5 '15 at 17:04
• However, there's one point I would question: that -20dB is adequate for anti-aliasing. This is probably true if the high-frequency components are a small part of the original signal, but external noise is not. The entire point of choosing this 24-bit ADC with ~100dB S/N instead of a 16-bit ADC is to record with at least 16-bit quality at a moment's notice with minimal thought towards the signal level. Given unchanged high-frequency noise with a reduced-level signal, I think I want as close to nothing at 6MHz as I can get with minimal effect at 20kHz and reasonable circuit complexity. – AaronD Jan 5 '15 at 17:15
• @AaronD - I wonder about -20dB being enough too. My experience is with Flash and SAR ADCs. But, the Theory of Sigma Delta seems to be that with oversampling, integration, and decimation, quantization noise is shaped, pushing the noise out of the passband into higher freqs. So, passband noise is low, while around sample frequency is high. If it's on the order of -20dB, any noise left by anti-alias gets lost in shaping. Look at analog.com/static/imported-files/tutorials/MT-022.pdf for a start, if you haven't already. Test and find out if true. Good Luck. – gsills Jan 6 '15 at 2:42
• Yeah, maybe so. It starts aliasing at Fs/2, which is 6MHz for Fs = 12MHz, but the digital filter still removes it until it gets to around Fs - BW. Only then does it appear in the wanted signal, and by then it's significantly lower than -20dB, coming from the same analog filter. – AaronD Jan 6 '15 at 16:31

Cirrus actually has an application note describing the intent of the circuits: http://www.cirrus.com/en/pubs/appNote/an241-1.pdf

From the descriptions in that document, you are right that the peaks shouldn't be there.

In general, the model could be wrong in two places:

1. The ADC input and DAC output characteristics are not being modeled. The circuits may expect a certain source/load.

2. The op amp model used may not sufficient for this circuit. I have found that some circuits that go out beyond 1 MHz need a higher gain-BW product than the typical generic models give. The evaluation board documentation for this ADC shows them using this circuit with a 2068 op amp which has a 27 MHz gain-BW product.

EDIT: After looking deeper, the exact values are used on their evaluation board for this part. So my recommendation is to first model it with the same part they are using, the 2068. This should hopefully show the correct operation.

EDIT2: I ran the ADC circuit on through QUCS, and they don't have proper spice models for real op amps. Linear Technology's LT spice is a very good free spice simulator. Running the circuit through there gives a nice flat response as predicted. (If you open this picture in a new tab, it blows up so you can see the details).

• Good find! It explains the goal a bit better, and provides examples for multiple situations, but it's not a detailed explanation of how the circuit works. (I guess they assume that if you're knowledgeable enough to appreciate their specs, you're knowledgeable enough to figure that out?) I discovered that if I remove the 470p caps around the opamps (open-circuit), the simulation does what I expect, but when they're there, I get the ~4dB peak at ~300kHz. Might they be real-world additions to help the specific amp that they tested with and not necessarily needed for mine? – AaronD Dec 30 '14 at 22:17
• Also, since you found one for the ADC buffer, I looked for a complementary one for the DAC. There isn't. At least not an exact match. However, what I did find had the same topology as I found in the datasheet with about the same level of explanation as the ADC note. But this one did a much better job of choosing component values to preserve the CMRR and not misbehave like the one from the datasheet. (cirrus.com/en/pubs/appNote/AN048Rev2.pdf) – AaronD Dec 30 '14 at 22:23
• I would suggest getting the model for the 2068 into your simulation first. The 470 pF capacitors are either for stability or they are for the low pass filter they mention. I had assumed the latter, but now I'm not so sure. – caveman Dec 31 '14 at 0:16