# How to use IO Buffer with defined location in VHDL?

I am tring to program the ADF4158 PLL Synthesizer with SPARTAN 6 FPGA using Microboard LX9. I studied VHDL for a semster 4 years earlier, and no practical use after that. So I need some experts suggestion to refresh my knowledge and acheive my goal. Below is the block diagram to explain my goal.

I am planning to use the PC to write the REGISTER values for the ADF4158 to a IO Buffer using a GUI tool as the register settings are very complex. Microblaze is the main controller, that sets a Enable signal HIGH for the SENDER block to copy the REGISTER values to the ADF4158, when the IO buffer write by the PC is over. The ADF4158 have 8 registers each with 32 bits. Below is the block diagram of the SENDER block:

The ADF4158 uses a particular timing sequence to tranfer the values to the 8 Registers. The value for the desired register is identified by the LSB of the 32 bit data of each register bit sequence. The Select Line needs to be toggled after each register data transfer. Image above.

Below is the code I wrote to establish the desired goal:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity Sender is
Port ( SS : out  STD_LOGIC := 1;
CLK : in  STD_LOGIC;
MOSI : out  STD_LOGIC_VECTOR(31 downto 0);
Enable : in  STD_LOGIC;
Data_IN : in  STD_LOGIC_VECTOR(31 downto 0));
end Sender;

architecture Behavioral of Sender is
variable counter : integer := 0;
variable bitCount : integer := 0;
begin
process(CLK, Enable)
begin
if rising_edge(CLK) and Enable = '1' then
if(bitCount < 320) ---check to avoid 320 bit out of bound
if (counter < 32) ---counter to toggle SS after every 32 bits
SS <= 0;
MOSI <= DataIN(bitCount);
counter <= counter + 1;
bitCount <= bitCount+ 1;
else
SS <= 1;
counter <= 0;
end if;
end if;
end if;
end process;
end Behavioral;


Now my question is, I want the SENDER to read the data from the IO Buffer and send to the ADF4158 device. How to I sent up the connection, or is it possible to code to read a IO Buffer with a defined address? This location of IO buffer is the one where the PC will store data. I am not sure if the code I wrote is correct, so i would warly welcome any suggestions for modification.

• Why is your MOSI port 8 bits wide? – mng Jan 6 '15 at 23:39
• Thats a super bad mistake @mng thanks for pointing it out. It should be from 31 down to 0. I will edit the post. – dDebug Jan 7 '15 at 8:25
• Actually I would expect MOSI to be a single bit wide, assuming your sender module is connected directly to the PLL chip. It's an SPI interface. – mng Jan 7 '15 at 19:12
• @mng thanks for the suggestion, I made the changes, please suggest on the current code. – dDebug Jan 8 '15 at 12:40
• There are a lot of issues with your code, starting with syntax. You should work with a simulator, and test every block of your design separately before putting it all together. You also probably need to understand more about how to use SPI. – mng Jan 8 '15 at 21:48