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As we know a CPU is pretty much billions of transistors on a single thumbnail, what if one of the transistors breaks?

Does CPU have any auto-recovery mechanism?

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    \$\begingroup\$ Actually the bigger ones nowadays contain billions of transistors. \$\endgroup\$ – starblue May 26 '11 at 19:59
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    \$\begingroup\$ "stable" is probably not the right word, as that points more towards issues such as metastability. A better choice for this topic would be words like 'defect-free' or 'yield'. Or you could ask about the stability of the manufacturing process, rather than the resulting chips. \$\endgroup\$ – Chris Stratton Aug 17 '12 at 17:24
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    \$\begingroup\$ @ChrisStratton, I think OP may be asking more about reliability than yield. \$\endgroup\$ – The Photon Aug 18 '12 at 17:06
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    \$\begingroup\$ If one of the transistors breaks, you throw the chip out. There's no redundancy (except some specific applications) and no repair options. \$\endgroup\$ – Dmitry Grigoryev Sep 20 '16 at 14:18

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It's simple, we test them before we sell them and throw the bad ones out.

There are lots of ways to do this - different people do different thing, often use a combination of:

  • some tests are at speed to make sure they go fast enough.

  • other tests involve a mode that turns some or all of the flipflops in the chip into giant serial shift registers, we clock known data into those chains, then run the chip for one clock and then scan the new results back out and check that they match our predicted results - automatic test tools generate a minimum set of "scan vectors" that will test every random gate or transistor on the chip - other vectors do special tests of ram blocks,

  • others test that the external wires are all bonded correctly

  • we make sure it's not pulling an unhealthy amount of current

Testing time costs money, we sometimes do some simple testing for obvious dead chips before they are packaged to discard the bad ones and then more testing after the packaging is done

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    \$\begingroup\$ "It's simple, we test them before we sell them and throw the bad ones out." If that would be the only quality system you would probable have a yield of 0.00000000001% with 1 billion transistor devices \$\endgroup\$ – Federico Russo Jun 13 '11 at 8:48
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    \$\begingroup\$ It really is that simple; the trick is in the extremely large amount of simulation and rule-checking beforehand to ensure that your yield is acceptable. There is rarely redundancy in CPU logic itself; sometimes you get a bit of redundancy in on-chip RAMs. \$\endgroup\$ – pjc50 Nov 7 '11 at 15:28
  • \$\begingroup\$ If the design is right, your individual failures come from material defects, contamination, process errors, etc. Although there are only a few wafer sizes in use, larger ICs are more expensive than their proportionate size, because the chance of a flaw increases with area. In a few cases, you can have a chip with more functional units than it is sometimes sold with, so it might still be marketable if one is bad, but that is limited. Sometimes you can buy FPGAs at a discount which are tested only to work as used by a particular config file, rather than to work with an arbitrary one. \$\endgroup\$ – Chris Stratton Aug 17 '12 at 17:21
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    \$\begingroup\$ I think you forgot to mention manufacturers like AMD selling processors with bad cores as a different model with the bad core locked. That is a kind of redundancy, or clever marketing perhaps. \$\endgroup\$ – akaltar Feb 28 '16 at 10:42
  • \$\begingroup\$ If anyone ever wondered how grey market parts are supplied, they should wonder no more. I've worked at the software end of chip fab systems, and automated testing as described here is a huge chunk of the time and money costs for plants. \$\endgroup\$ – user65586 Feb 28 '16 at 13:59
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To expand a bit on what others have said: There is validation and after that there is classification of chips.

Transistors in CPUs tend to show their problems at higher frequencies, so it is common to make one CPU and then market it as several different products. The cheaper CPUs are actually damaged versions of the expensive CPU. Another option is disabling certain parts of the CPU. For example, AMD made processors with BArton core. It also sold processors with Thorton core. Thorton wasn't a new core. Instead, half of L2 cache was defective and disabled. This way, AMD made some recovery on the CPUs that would have been otherwise wasted.

Same thing happened with AMD's 3 core processors. They were originally 4 core processors, but one of the cores was determined to be defective, so it was disabled.

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    \$\begingroup\$ it is not uncommon to make a chip design with features you can disable by blowing fuses. Simple economics of chip yield, if we can salvage all or part of the chip by running it slower or by disabling a feature that failed in test, we can recover some of the cost of that part rather than toss the whole part. you can go back to the intel 386 SX and DX as examples as well. and pretty much every cpu is speed graded. the slower ones are parts that failed at faster speeds. \$\endgroup\$ – old_timer Feb 28 '16 at 15:23
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    \$\begingroup\$ No, not the 386SX/386DX. These chips have a totally different bus interface. You don't just disable a part of the 386DX to get a 386SX. What you say is true for the 486DX/486SX, the latter having the FPU disabled. \$\endgroup\$ – Michael Karcher Feb 28 '16 at 20:45
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The answer to your question is, "No." There are currently no auto-recovery methods, for hardware failures.

Manufacturers engineer their processes to get the best yield (dollars) possible from their wafers. By shrinking the transistors, they can fit more functionality into less area. This can be thought of as more chips (of the same functionality) per wafer. As the chip size shrinks, you can get more of them out of a wafer, but as they shrink, more of them turn out bad. Manufactures accept this, and are constantly pushing the envelope of technology to shrink chips. The thing which tells them they ARE at the edge of the envelope is bad chips.

If a company can shrink feature size to 70% of the old feature size, they can get about 2 times the number of chips on a wafer. If their yield on the old process was 95% (say, 95 good chips chips out of 100 on a wafer) and their yield on the new process is 75% (150 good chips out of 200 on a wafer) they made money going to the new process.

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    \$\begingroup\$ For some types of chips such as NAND flash memories, manufacturers routinely push the envelope beyond the point where zero-defect chips would be the norm, but most of the failures will have somewhat predictable characteristics, and the devices using the chips will be expected to work around them. \$\endgroup\$ – supercat May 26 '11 at 22:42
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At small nodes, each "transistor" is 2 gates unless you have memory, such as SRAM. If one doesn't work, you just have a slow driver. For SRAM, if it doesn't pass, you just "blow" the row. If both of the FETS on transistor fail, you'd have a very expensive piece of sand, but I've personally never had that happen. The modern FinFETs are so small, there are a bunch of production problems (hassles mainly) due to the nature of lithography and probability. You will find that first things out on new processes are FPGAs because you can just "blow" the bad cells and change the routing graph. I cannot give you the numbers, but you can guess by how the x86 world does binning, things seldom go perfectly.

Here's an illustration of the layout of an XOR cell: XOR

The green bars left/right are fins, and the red is poly. The blues are the coloured metal at level 1.

Commercial CPUs do not have an autorecovery mechanism, but things floating around in academia and special application CPUs do. I've made some specialized components that use asynchronous architectures to solve clock issues that arise due to bad gates though destruction of oxide of a hole as a hot carrier where you just get one really slow transistor.

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Apparently times have changed. Many of the five year old answers in this question no longer reflect the state of art and some were not accurate then.

Transistors and other devices on silicon are fairly stable after manufacturing, provided the IC does not overheat.

Here are things now done in a modern IC manufacturing process to minimize defects:

  • ICs are extensively tested, both at the level of design validation and verification, and individual specimen tests. This paper describes some testing procedures for the Pentium 4.
  • the overall design of ICs is now too complex to verify completely
  • ICs have programmable microcode, which allows a limited degree of reprogrammatibility if defects are discovered after manufacturing
  • modern ICs contain redundant silicon layers, allowing defects discovered during manufacturing to be corrected
  • many CPUs have redundant hardware modules, whether these are CPU cores, cache memory or other IP; if not all units are functional, some can be disabled and "binned" as lower cost parts. One example is the PS4 multi-core IC includes one redundant core that is disabled to achieve a higher yield.
  • some CPUs will perform but not at top speed; these can be sold as lower speed, lower cost CPUs
  • many CPUs and RAM use error correction coding (ECC) memory or perform message validation error correction at various stages of data transfer to ensure integrity
  • sometimes processors will fail in a way that causes a system crash but does not prevent the system from working again if rebooting (CMOS latchup)

Programming errors in the processor's formal specification are more likely than failures of a particular transistor.

While common CPUs don't have anything like an autorecovery ability, there has also been work on self-resetting CPUs as a countermeasure for cosmic rays. Cosmic rays can deposit enough energy in a CPU or RAM to cause bit-flips.

As pointed out in comments, mission critical systems have relied on multiple CPUs for verification for a long time. The space shuttle, back in 1976, as one example, used five computers, four of which ran the same program and "voted" on all flight control decisions to ensure safety.

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  • \$\begingroup\$ ECC and error detection have been used for quite some time (for memories and communication, for arithmetic and similar logic functions some higher-end systems have had error detection for years). Similarly, redundant execution (spatial or temporal) has been used to detect errors for quite some time in systems where the cost in hardware/execution time seems justified. \$\endgroup\$ – Paul A. Clayton Feb 28 '16 at 15:13
  • \$\begingroup\$ @PaulA.Clayton if you would make a post about Itanium and latterly Xeon RAS features, I would certainly be glad to vote for that. \$\endgroup\$ – Oleksandr R. Feb 29 '16 at 23:43
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Most modern processor transistors are FETs. These have the advantage of gaining source/drain resistance when starting to overload. This is one factor that allows high power MOSFETs to be made by putting many in parallel. The load automatically distributes. That may be a factor to help distribute issues. But I think it is really simpler than that.

As with most electronic parts, if you drive them within spec, they will last for quite a while. When a microprocessor is made, there are two factors for the cost. Just the space on the silicon and, due to complexity, the actual yield. Not all chips work after manufacturing. However, once it is made and pasts the validation, you know the transistors are good. If driven within spec, chances are that they will stay good.

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Have you ever wondered why the same chip is sometimes sold at different speeds? And have you noticed that sometimes the same GPU chip architecture is sold with different number of internal units?

There is no way of fixing a hardware defect at the silicon level, but over time designers have learned to deal with the problem of increasing the yield. With no foresight, the yield is solely dependent on the manufacturing quality. However, if you are clever, you can recover some of the bad chips.

For instance, let's say that you have a 18-core chip design, that work more or less independently. During testing, you sort perfect chips and release it as the A18 model. Most failed chips have only one error, so they will work fine as long as the faulty core is disabled. You sell these as the A17 model at a slightly lower price, and those that have two bad cores are sold as the A16 model at an ever lower price.

The same can apply to a chip's speed rating. Perfectly manufactured chips will be capable of running at speeds beyond the design spec, but chips with problems might not. These are sold at lower speed specs.

This method will dramatically increase the overall yield and is therefore quite commonly seen. The PlayStation 3 for instance has 8 SPE units in hardware, but one is always disabled to account for yield problems.

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Does CPU have any auto-recovery mechanism?

No as explained above. However their caches, especially L2 and L3, can have extra RAM in them. When the part is tested at the factory, bad RAM blocks can be removed and the extra RAM blocks used.

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In general no, you cover bad transistors through chip screen, and you expect a relatively small percentage of losses after that. The chip business has been around for decades they have lots of tricks for managing this (and yes, sometimes one of the tricks is to just let bad parts out and replace them for free or let the customers be unhappy).

For radiation hardened environments (space) you would likely be triple voting, every "bit" actually has three bits that vote to make one. it only takes a two thirds vote to determine the bit setting. so transistors in the other third could go bad and will with total dose eventually. but the primary concern is single event upset. Those chips and systems are designed for these environments from top to bottom, silicon, hardware, software, etc. And they use old tried and true tech, not cutting edge, so the transistor count and size of the transistors is from years ago.

COTS is expected to hiccup and fail from time to time.

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It may seem like a miracle but there are a number of mechanisms used to reduce the amount of transistor failures. However, depending on the type of failure experienced by the transistor and where, the CPU may or may not still be usable sometimes under certain conditions.

At present, there is often no auto-recovery mechanism built in but there is a lot of research into reconfigurable computing, redundancy and other techniques to minimise this problem.

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