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I am working out the ideal RTL NOR circuit to use as universal gates for a large project.

Based on what I've found on Wikipedia, to implement a NOR gate using BJTs and resistors, we have the following:

enter image description here

In this case, R3 & R4 provide paralell input to the base of the transistor. We can ignore R1 as it really isn't required for silicon transistors.

Inputs A and B seem to supply the same 5V whether they are both high or not right? To test it, I have implemented this NOR gate like this:

enter image description here

The pullup resistor is 1K ohm and the input resistor that both inputs go through is 10K. The transistor is a 2N3904.

I've tested this NOR gate and the truth table it yields is right on for NOR. I'm wondering if this simplification has any implications that I'm missing. Is there a specific problem with fan-in here? Ideally, I'm looking for the simplest circuits for mass production. I would like to avoid any complications that may arise when combining many NORs to produce other gates.

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    \$\begingroup\$ What is the schematic? It looks like you have the inputs shorted together. That's not going to work in general. \$\endgroup\$ – Spehro Pefhany Jan 8 '15 at 19:32
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No you cannot (in general) use just one resistor and short the inputs together, assuming that's what you are doing.

If you connect (short) multiple RTL outputs together you'll have a so-called wired-OR circuit (actually it will be an AND circuit) and that will appear to work (at least until all those output resistors in parallel become too low), and the inverter will give you a NAND output.

However, by connecting the outputs together they no longer have individual logic states and cannot be connected anywhere else and appear as the correct logic state. In other words the wired-OR (AND) function is occurring at the OUTPUTS of the gates that are connected together rather than inside the gate.

You think you are seeing a NOR function because open-circuit is actually appearing as a high (1).

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Unlike with TTL or CMOS, connecting multiple RTL outputs together will not create a short between V+ and ground, and this will "wired AND" them together, and the R2s of the previous gates will act as the base resistor. The issue comes when you connect multiple inputs to an output used in this way; since there is no resistance between the two outputs, all will see the same ANDed result regardless of which it is "supposed" to be connected to.

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No, you can't.

To answer the question "Why?", think about what the voltage at AB (the combined A-OR-B node) if A was HIGH and B was LOW.

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