# Implementing logic gates in CMOS

I'm trying to build the below function with CMOS, is my implementation correct?

$$F = ABC + (\overline{B+C})D$$

I am having trouble with the $$(\overline{B+C})$$ in all of the examples I've seen the function is in the form $$F = \overline{blablabla}$$ (the inverse of the whole expression).
I gave it a try but I'm not sure if it's correct, for example is it ok to have ~A as input to a PMOS (I don't see why not).

The correct layout after Dave Tweed pointed out the missing connections on the N-block.
(The added connections are marked with pink)

Yes, your solution is very nearly correct. Here are the steps, which you really should have shown in your question:

In order to deal with the second top-level term, you need to apply De Morgan's Law, which states:

$$\overline{A \cdot B} = \overline{A} + \overline{B}$$

and

$$\overline{A + B} = \overline{A} \cdot \overline{B}$$

Using this, you can make the following transformation:

$$(\overline{B + C}) \cdot D = \overline{B} \cdot \overline{C} \cdot D$$

This transforms the entire function into:

$$F = A \cdot B \cdot C + \overline{B} \cdot \overline{C} \cdot D$$

which is a normal sum-of-products expression.

In order to implement this in CMOS, however, you need a function that has an overall inversion, so you need to apply the law again:

$$F = \overline{\overline{(A \cdot B \cdot C)} \cdot \overline{(\overline{B} \cdot \overline{C} \cdot D)}}$$

and again (two places):

$$F = \overline{(\overline{A} + \overline{B} + \overline{C}) \cdot (B + C + \overline{D})}$$

Your schematic diagram is correct, but your layout does not quite match it. There are a few missing connections on the NMOS side.

From what I remember of this logic manipulation there an interim step not being shown that may help. This is transforming ~(B+C). Doing the double ~ transform can convert it to (~B~C). So you can combine the equation's right side as ~B~CD. (You already have that part implemented on the upper right of the schematic).

So the equation can be rewritten: F = (ABC) + (~B~CD) . In this form it may be easier to verify the "discrete" CMOS implementation. The function is now the OR'ed inputs of two, three input AND'ed groups.

I hope this helps at least partially.

• Ah, Morgan. That's the guy I couldn't remember. And I must say, isn't it a lovely Morgan on this side of the pond.....? – Nedd Jan 14 '15 at 12:35
• I sort of liked the F=~blablabla part. But I thought we were only using ABCD, so what the l ? So for now I'll just get the l out of here... – Nedd Jan 14 '15 at 12:44