I want to move data from a "Bit_vector" to "Std_logic_Vector". For that, I want to convert Bit_Vector into Std_Logic_Vector. Please help me for the same.
\$\begingroup\$
\$\endgroup\$
4
asked Jan 20, 2015 at 5:25
1 Answer
\$\begingroup\$
\$\endgroup\$
2
Try Srinivasan Venkataramanan's solution
Use IEEE.STD_LOGIC_1164 package's function To_StdLogicVector to do this:
FUNCTION To_StdLogicVector ( b : BIT_VECTOR ) RETURN std_logic_vector;
-
1\$\begingroup\$ I tried its working... To make it simple S<=to_stdlogicvector(b); \$\endgroup\$ Jan 20, 2015 at 5:58
-
\$\begingroup\$ It's not so much Srini's solution as it is knowledge of the package std_logic_1164. See the Supplemental Material download for IEEE Std 1076-2008. The package sources can be searched and you can learn how things work in VHDL from them. \$\endgroup\$– user8352Jan 20, 2015 at 21:55
function To_StdLogicVector (b : BIT_VECTOR) return STD_LOGIC_VECTOR;. Searching these package sources make a great authoritative alternative to a second hand answer when trying to learn how things work. Interogative google searches (how to convert bit_vector to std_logic_vector in vhdl) usually point you to an answer, likely where Sarrk found it in this case. \$\endgroup\$