I'm trying to understand how the circuit below works so I ran a simulation with TINA and I got the curves shown on the right (C3 is already charged).
Considering the characteristic curve of that BJT (shown below), I can't understand how it is possible for Vce to decrease with decreasing Ic.
My reasoning is as follows (the lines are not the ones corresponding to the circuit above, but they are close enough to expect a similar behavior):
The red line is the DC load (Vtank = 0) and the green line is the one I would expect after Vtank (EDIT: I made a mistake here, this Vtank is 180° out of phase with respect to the one shown above, but the discussion still stands), increases from 0. The yellow dot is the initial Q point. Since the Q point must be on the green line after a certain time, and since the simulation says that both Vce and Ic decrease, I'm having trouble understanding what's going on.
Of course Ic can't simply increase either because otherwise Vbe would go down (through Re) and Ic would be immediately interrupted.
After trying with a lower frequency and with a higher Re I got this:
Here is a bigger one.
So what seems to be happening is that locally (higher frequency) the transistor is behaving like I expected but non locally (lower frequency) the tank oscillations define the behavior. I would like someone to confirm this.