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I'm attempting to learn a little more about SMPS design while referring to existing designs and posts such as this one: SMPS PCB Design Critic

I'm implementing an AL8805 based constant current buck for an LED and I'm looking at the evaluation board data sheet that diodes inc have done (link)

This is the circuit diagram with my attempt at showing the loops:

enter image description here

And this is their top layer implementation:

enter image description here

U1 is a little hard to see because I scribbled on it but that's the 5 pin AL8805 with (anticlockwise from top left pin): SW, GND, CTRL, SET and VIN.

I don't have an image of what the bottom of the PCB looks like but I have to assume that Vin, routed on the bottom, crosses that top trace from the inductor to the LED. It ends up to the right of C1 at that pad with the 6 vias. And that looks like crossing a split ground plane with the input power trace. I thought you weren't supposed to do that for EMI purposes? Is it ok here? Could they route it some other way like under L1 !? (As L1 is shielded).

If I redesign, I can flip the inductor 180 degrees but then I have possibly a worse problem trying to route the CTRL trace out - is it generally a bad idea to route control lines that this anywhere near power switching lines? I'm wondering how much space you are supposed to give.

Edit: Addition of other reference layouts for this same buck regulator:

This is the layout (Eagle) for the Picobuck (from Sparkfun) which is a triple AL8805 LED driver.

enter image description here

The position of the LED decoupling capacitor is interesting. I would be concerned about the CTRL line running right underneath it to P1 but I'm not sure...

This is the layout for the Femtobuck (also from Sparkfun).

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It's odd the way the control has its own ground (pin 3 and 4 on the right hand connector) which snakes under the AL8805 and is viaed under the inductor. The control line seems to go out of its way to flow underneath the resistor which I'd imagine would be a source of noise.

Interesting how the return from the LED into pin 2 of the inductor is also made to flow under the output to the LED from the resistor...

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  • \$\begingroup\$ As a matter of interest I've found two (open) designs on Sparkfun that use the AL8805. The picobuck and the femtobuck. Both flip the inductor 180 and bring the CTRL pin out on the bottom layer under pin 4. I can post pictures but it might make for a post that's two bulky? \$\endgroup\$ – carveone Jan 23 '15 at 20:56
  • \$\begingroup\$ post them, all reference material is good \$\endgroup\$ – JonRB Jan 23 '15 at 21:06
  • \$\begingroup\$ Sure thing. The one thing they does show is that there are balances to be made in routing. Sometimes you can't make it perfect... \$\endgroup\$ – carveone Jan 23 '15 at 23:22
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    \$\begingroup\$ The crossing Vin and one leg of the LED is not going to have any real effect. In contrast, there is one item begging to be optimized, that is the placement of C4. \$\endgroup\$ – rioraxe Jan 24 '15 at 2:40
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You have mis-drawn the ORANGE loop.

D1 is providing a free-wheel path when the SW pin goes OPEN.

L1 will want to maintain its current flow so the current will commutate from the FET/BJT at the SW pin to L1.

This current will then flow down R1 -> LED -> LED to maintain the current flow of L1.

Should you cross the tracks involving the regulation inductor? no. This is a very noise loop and if you are not careful you will cause coupling

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  • \$\begingroup\$ Ah. I blindly copied the orange one from a diodes.com AL8805 video on EMI (youtube.com/watch?v=ezwfdqMgfjI#t=73). I could see from the scope traces how noisy the inductor loop is which is why I wanted to try and avoid cross its path. \$\endgroup\$ – carveone Jan 23 '15 at 20:50
  • \$\begingroup\$ Ok, all the other designs I've see avoid crossing tracks involving the regulation inductor. This is evidently a rule to follow. \$\endgroup\$ – carveone Jan 23 '15 at 20:57
  • \$\begingroup\$ Not only do I avoid crossing tracks under the inductor in all designs; unless it is a toroid, I try and void every layer beneath it as well if I have space. \$\endgroup\$ – Peter Smith Apr 10 '16 at 15:29

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