I am not sure if this concrete question and this practically oriented forum are the right place to reveal the philosophy behind the "wired OR" gate... but let me try... Here is my explanation why the "wired OR" really represents the OR logic function.
There is nothing special in this connection; actually it is the primary and most elementary OR gate. Only to see the OR logic function here, we have to think in terms of resistances, conductances or switch states.
From this point of view, the primary OR gate consists of elements (resistors, conductors or switches) connected in parallel that are driven by the input logical variables so that "conduct" (closed switch) represents "logical 1". It is obvious that, in this arrangement, the equivalent network will conduct (output logical 1) if only one of the elements conducts (input logical 1).
Dually, an AND gate consists of such elements connected in series. Now the equivalent network will conduct (output logical 1) if both the elements conduct (input logical 1).
Only electronic circuits use voltages (or more rarely, currents) as input and output variables. So, we should first convert the input voltages into resistances by some "electrically-controlled resistors" (FET, BJT, etc.), and then - the equivalent output resistance to voltage, by passing a current through it. The role of the pull-up resistor is just to provide this current.
NMOS logic gates are implemented exactly in this way. For example, an NMOS OR gate consists of NMOS transistors in parallel and a pull-up drain resistor. So, in this case we think of the whole combination as of an (N)OR gate including the transistors. The same is true in the case of RTL gate (the picture below).
But what do we think in the case of a "wired OR"? What is the gate itself? In this case we do not consider the transistors as belonging to the logic gate... we consider them as external (belonging to the previous gates). And also, we do not consider the pull-up resistor as belonging to the logic gate... we consider it as external (belonging to the next gate).
But wait... what has remained then from our logic gate? Only a point, node, joined wires... that is why it is named "wired OR".