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From the perspective of data capture, how is this achieved? If I wanted to implement a home-made digital device to capture high frequency analogue signals, what are my options? So far, I've only come up with some fairly useless ideas for designs!

Using a PIC microprocessor, the A/D sample rate on a 18f series I believe works out to be in the order of 1Mhz at 10 bit accuracy if I'm correct (?) And I can't imagine dedicated A/D chips being much better, how do modern scopes achieve frequencies in the GHz?

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    \$\begingroup\$ Typically FPGAs or some other processor is used to be able to handle that much data from an external ADC. There is no way a PIC would be able to handle it. \$\endgroup\$
    – Kellenjb
    Commented Jun 6, 2011 at 14:03
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    \$\begingroup\$ Thank you for everyone's answers and comments, choosing the best was difficult, all combined answered my question very nicely! \$\endgroup\$
    – Jodes
    Commented Jun 6, 2011 at 14:55

6 Answers 6

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The entry level DSO Rigol 1052E (the one I own and 100 MHz capable with software change) uses an Analog Devices AD9288. This is a dual channel ADC with 8 bit parallel outputs and samples at either 40 or 100 million samples per second (depending on speed grad of chip). Although the Rigol is a 1 Gig samples per second, so I'm not sure if they are multiplexing these or what exactly is giving them 10x the samples of the single chip.

The AD9288 has bit-per-stage pipeline type converter for the 5 MSB bits and uses a 3-bit flash for the final 3 LSB. This makes sense, as the higher magnitude should be easier to convert fast with pipelines. As your ADC speeds go up, the number of bits sampled via flash conversion will increase, as steven said.

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    \$\begingroup\$ They do have 5x of these chips (overclocking them overspec to 100Mhz), and they do precise commutation via CPLD, where you can trim delays down to picoseconds. \$\endgroup\$ Commented Jun 6, 2011 at 14:17
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    \$\begingroup\$ That makes sense. It is capable of 1 Gs/s with single channel, using 5x2channels for 10 samples offset. When you go dual channel is drops to 2x 500Ms/s with each channel getting 1/2 of each of the 5 chips. \$\endgroup\$
    – Joe
    Commented Jun 7, 2011 at 12:54
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I presume they use Flash ADCs. These have the advantage that the conversion is immediate, while SA (Successive Approximation) ADCs like used in most microcontrollers perform an algorithm that requires a number of steps. A disadvantage of Flash ADCs is that they are rather heavy on hardware (an 8-bit ADC has 255 comparators), but most scopes don't have very high resolution. (Analog scopes often were 3% accurate, which translates to 5 bit.)

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  • \$\begingroup\$ Another approach I've read about is to do a cross between a flash ADC and a successive-approximation one. Once can achieve a 10-bit conversion using a 6-bit flash ADC and a 6-bit DAC; the flash ADC is first used to divide the input range into 64 subranges, whereupon the DAC then sets the DAC's analog voltage range to the top and bottom of the range it's in (in theory one could do a 12-bit conversion that way, but getting things that precise would be difficult), so IIRC manufacturers use one more bit on the flash ADC than would theoretically be required. \$\endgroup\$
    – supercat
    Commented Jun 6, 2011 at 15:33
  • \$\begingroup\$ Yet another approach which would be possible, though I don't know if anyone uses it, would be to design a chip with multiple slower ADC's in it and have them sample the input at intervals. One might want 500,000,000 conversions/second, but would likely not need to get any particular conversion within 2ns of when the signal arrives; a chip with 10 ADC's each of which took 20ns for a conversion would work just fine might be easier to build than one which could do a single conversion in 2ns. Not sure how much that approach is used, though. \$\endgroup\$
    – supercat
    Commented Jun 6, 2011 at 15:37
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Jodes, your comment says you got your answer, but there's much more to the solution than Flash ADCs. Have a look at Agilent's Application Note, "Techniques to Achieve Oscilloscope Bandwidths of Greater Than 16 GHz." I used to work on that campus (but don't claim to have detailed scope experience). Agilent in Colorado Springs is the global hub of knowledge related to multi-gigahertz signal processing. They worked on a 32GHz solution for years and just started shipping last year. The active probes and microelectronics that do the signal processing are extremely sophisticated. Check out the entire library of documents related to Agilent's Infiniium 90000 X-Series high-performance DSO and DSA oscilloscope. Google it -- the URL is ugly and I'm not sure they offer a permanent link to the library page. You might also want to have a look at the related patents.

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    \$\begingroup\$ 9 years later, Keysight Technologies carries on from Agilent oscilloscopes. Their latest spec is 110 GHz. I hear it is still the fastest. Same for frequency domain. \$\endgroup\$
    – tbc0
    Commented Aug 8, 2020 at 17:00
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Oscilloscope manufactures advertise with 'equivalent sampling rate'. This is NOT a live sampling rate. This is a sampling rate done by using samples of multiple periods, and taking samples at different moment of the signal. Combining these, and you get a higher 'equivalent sampling rate'. So if you would have 100MSPS ADCs and do this 10 times (really bad!) , you get 1GSPS.

This is bad because it assumes your signal is periodic, which it isn't all the time.

What is important of a oscilloscope is the 'single shot' sampling rate. It's also a functionality you are likely to use (capture a step response for example), or have a close look at a non-dancing waveform. It gives an indication what the hardware is capable of, not 'polished' by software. Hardware can be interleaved, i.e. using multiple high-speed ADCs and time the 'start conversion' signals at the right time. This is also the reason why some scopes will have higher sample rates in single channel mode than in dual channel. Your typical PIC18 series only has 1x ADC converter, but multiple channels (done with an analog MUX).

Also, dedicated ADC chips can be much, much faster. 100MSPS isn't too awkward to find. Take a look here, National advertises these as ultra high speed. I don't know how they exactly work, I see the 3GSPS ones use internal interleaving already.

http://www.national.com/en/adc/ultra_high_speed_adc.html

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  • \$\begingroup\$ This deserves more votes - DSO's allow the marketing department far too much creativity with the specs compared to analogue scopes. \$\endgroup\$
    – John U
    Commented Nov 14, 2013 at 14:27
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    \$\begingroup\$ Today's inexpensive 1 GS/s scopes actually do sample in real time at that rate, in single channel mode - the other answers explain how it is accomplished by using several phase-staggered ADCs with sample & hold bandwidth far above their conversion rate. \$\endgroup\$ Commented Nov 14, 2013 at 16:13
  • \$\begingroup\$ I don't think that there's nearly as much creativeness with specs as this answer implies. Rigol, to give just one example, doesn't advertise "equivalent sampling rate" at all on their low end 'scopes because they don't even have equivalant-time sampling; they're very clear that the rates they're giving are real-time rates, and they compare against real-time rates on competitors' scopes. \$\endgroup\$
    – cjs
    Commented Aug 12, 2019 at 2:04
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The Rigol 1052E as mentioned by Joe is a great example of how to do this efficiently and cheaply. It uses a pile of independent ADCs, all of which having a slower sampling rate, and clocks them out of phase with each-other. This way, samples get pulled from each ADC in turn round-robin style.

Obviously your timing has to be extraordinarily precise to do it this way, and it appears that the 1025E uses a PLD to do just that - and given that the same board also has an FPGA associated with processing the incoming signal, it appears that the PLD (which is much less powerful but with more predictable internal routing) was added because of its ability to generate and process signals with very precise timing.

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They interleave the multiple adcs with clocks that are slightly out of phase with one another, getting 5x the sample rate of a single chip. Also, for a periodic signal, there is a trick that a lot of modern scopes use which is to have a sampling clock that is out of phase with the signal being measured, so that on successive samples, a different part of the waveform is being sampled, though in a different cycle of that waveform. Then after enough samples are taken, they can then reconstruct the signal if they can determine the fundamental frequency of the waveform being measured (much easier to do). Make sense?

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