Frequency of the CTC mode in the atmega328

I am trying to understand the expression for the waveform frequency of the CTC mode (p. 99 of the datasheet).

Assuming that the prescaler is 1 and that $OCR0A$ is a constant value, in $(1+OCR0A)/f$ seconds the $TCNT0$ regsiter restarts from $0$. So the frequency is $f/(1+OCR0A)$. My reasoning is off by a factor of $1/2$. What am I missing?

• $f$ is clock frequency. It needs to be halved according to the datasheet. I don't know why. – Suba Thomas Jan 28 '15 at 17:34
• Throw in some numbers and show your exact calculation! – Rev1.0 Jan 28 '15 at 17:45
• My question is about an expression on p.99 of that datasheet. I am trying to understand how it came about. That's all. – Suba Thomas Jan 28 '15 at 17:52

The frequency you have calculated is the frequency at which the output toggles.

So if you calculate a frequency of 10kHz that means the output toggles 10,000 times per second. That is, goes high if it's low, or goes low if it's high. That means you have to generate two cycles through the timer to generate a single period of the output frequency.

For generating a waveform output in CTC mode, the OC0A output can be set to toggle its logical level on each compare match by setting the Compare Output mode bits to toggle mode (COM0A1:0 = 1). The OC0A value will not be visible on the port pin unless the data direction for the pin is set to output. The waveform generated will have a maximum frequency of f OC0 = f clk_I/O /2 when OCR0A is set to zero (0x00).

So an calculated frequency of 10KHz will in fact generate an output frequency of 5KHz.

To make it more pictorial, here's the toggles:

CTC: 10kHz T T T T T T T T T T
Out:  5KHz 1 0 1 0 1 0 1 0 1 0

Every time the CTC cycles it inverts the IO pin. So two cycles makes a full on-then-off cycle of the IO pin. Hence the /2.

• Thanks much. I was not thinking in terms of the $OC0A$ pin, but rather in terms of the timer frequency itself and the $TIMER0$_$OVF$ interrupt. And now after a more careful reading, I realize that a match does not trigger the interrupt in CTC mode, unless it is $0xFF$. – Suba Thomas Jan 28 '15 at 18:23