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I know some digital logic. Here is a simple Full adder schematic. It is easy to understand the digital part but i don't understand the logic of adding transistor on the sum output? What is the purpose of adding this transistor? Why only at the sum output? Why not the carry output as well.

See below

Any recommendations on how to nail down more sophisticated schematics?

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  • \$\begingroup\$ As drawn the transistor and accompanying resistors do not make sense. The R2/1k load is switched on and off with the rhythm of the sum output, it is directly connected across the power supply. But a 1k resistor on its own doesn't do much af a practical job in this configuration. \$\endgroup\$
    – jippie
    Jan 31, 2015 at 12:14
  • \$\begingroup\$ Where did you find this schematic? Interpreting the nuances you're asking about depends very much on context. \$\endgroup\$
    – Dave Tweed
    Jan 31, 2015 at 12:15
  • \$\begingroup\$ You might be surprised but i took this figure from Cadence Orcad Schematic Flow tutorial \$\endgroup\$
    – user2979872
    Jan 31, 2015 at 12:16
  • \$\begingroup\$ @DaveTweed, there is no nuance. As i said, the schematic is taken from a tutorial on how to draw a schematic using Cadence ORCAD software. \$\endgroup\$
    – user2979872
    Jan 31, 2015 at 12:19
  • \$\begingroup\$ @jippie, assume that the schematic is wrong, which is unlikely. How would you add the transistor at the sum output in a meaningful way? Please educate me and the rest of the community \$\endgroup\$
    – user2979872
    Jan 31, 2015 at 12:21

2 Answers 2

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Looking at the circuit you posted, the transistor Q1 does not have a function.

Activation/deactivation of Q1 does not cause:

  • any information to reach CON2.
  • influence of any kind on other sub-circuits you have shown

If you think this is not so, you will have to show us more of your circuit.

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  • \$\begingroup\$ Thank you for the "answer accepted", but if jippie post his anwer, you should reconsider. \$\endgroup\$
    – iggy
    Jan 31, 2015 at 18:00
  • \$\begingroup\$ Enjoy the rep. I'm having a lazy day ;o) \$\endgroup\$
    – jippie
    Jan 31, 2015 at 18:58
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R1, Q1 and R2 make up a TTL logic inverter, where R1 limits the base current and R2 is the load. However, the output is between Q1 and R2, and it is not indicated by a pin in the schematic.

The connector only connects to the supply rails. For what reason it is done like this, I cannot say.

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