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Let's consider dynamic RAM - 1 cell = capacitor+ transistor and second storage device, - for example ordinary mmc NAND flash. DRAM, so called volatile memory, need to be refreshed to keep capacitors charged. That is why DRAM couldn't work without power supply. I don't know how NAND flash exactly works, but it seems that it uses floating gate transistors and some quantum tunnelling magic to hold a charge even if the power supply is disabled. So the question is what is fundamental most significant reason why NAND (NOR) flash couldn't be so fast as DRAM? Thanks.

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    \$\begingroup\$ Erasing and writing any kind of flash takes much much longer than flipping a flip-flop. The quantum tunneling magic takes time. \$\endgroup\$ Jan 31 '15 at 15:24
  • \$\begingroup\$ Why? and how this magic approximately works? \$\endgroup\$ Jan 31 '15 at 15:26
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    \$\begingroup\$ A certain amount of charge has to be shoved through a near-insulator. \$\endgroup\$ Jan 31 '15 at 15:46
  • \$\begingroup\$ Flash memory moves much more electrons than DRAM. Or in other words: Writing Flash in DRAM speed would overheat the flash. \$\endgroup\$
    – Paebbels
    Jan 31 '15 at 23:20
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Due to the different topology and the fact that you're using tunnelling, NAND must be erased in blocks before being written to. This means doing writes becomes a two step process. The topology increases bit density but makes it more difficult to perform random accesses.

DRAM doesn't have this limitation, since it's just a capacitor, with basically a wire to it, you just charge and discharge the capacitor. There's no concept of erase before write. DRAM's topology also allows virtually random accesses so there's no penalty there when performing writes because you don't have to erase entire blocks.

Having to use quantum tunnelling for NAND doesn't help either.

NAND Flash NAND Flash

DRAM enter image description here

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