Let's consider dynamic RAM - 1 cell = capacitor+ transistor and second storage device, - for example ordinary mmc NAND flash. DRAM, so called volatile memory, need to be refreshed to keep capacitors charged. That is why DRAM couldn't work without power supply. I don't know how NAND flash exactly works, but it seems that it uses floating gate transistors and some quantum tunnelling magic to hold a charge even if the power supply is disabled. So the question is what is fundamental most significant reason why NAND (NOR) flash couldn't be so fast as DRAM? Thanks.
Due to the different topology and the fact that you're using tunnelling, NAND must be erased in blocks before being written to. This means doing writes becomes a two step process. The topology increases bit density but makes it more difficult to perform random accesses.
DRAM doesn't have this limitation, since it's just a capacitor, with basically a wire to it, you just charge and discharge the capacitor. There's no concept of erase before write. DRAM's topology also allows virtually random accesses so there's no penalty there when performing writes because you don't have to erase entire blocks.
Having to use quantum tunnelling for NAND doesn't help either.